SMD133 (AA6023) pinout: Difference between revisions
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Krzysiobal (talk | contribs) (Created page with "SMD133 (AA6023) pinout PPU A11 -> / 1 48 \ <- PPU A12 PPU A10 -> / 2 47 \ <- CPU A12 VCC -- / 3 46 \ -> CHR A10 GND -- / 4 45 \ -> CHR A16 CPU A1 -> / 5 44 \ -> CHR A11 PX0 (=$5001.1) <- / 6 43 \ -> CHR A19 CHR A13 <- / 7 42 \ -> CHR A18 CHR A14 <- / 8 41 \ <- CPU D3 CHR A12 <- / 9 SMD133 40 \ <- CP...") |
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SMD133 (AA6023) | SMD133 (AA6023): LQFP-48 (canonically [[NES 2.0 Mapper 268]]) | ||
PPU A11 -> / 1 48 \ <- PPU A12 | PPU A11 -> / 1 48 \ <- PPU A12 | ||
PPU A10 -> / 2 47 \ <- CPU A12 | PPU A10 -> / 2 47 \ <- CPU A12 | ||
Line 24: | Line 24: | ||
PRG A18 <- \ 23 26 / -> POEB (=PRG /CE) | PRG A18 <- \ 23 26 / -> POEB (=PRG /CE) | ||
CPU A13 -> \ 24 25 / -> PRG A17 | CPU A13 -> \ 24 25 / -> PRG A17 | ||
Source: [https://aliexpress.com/item/1005004245220736.html] | Source: [https://aliexpress.com/item/1005004245220736.html] | ||
[[Category: pinouts]] | [[Category: pinouts]] |
Revision as of 17:34, 13 October 2022
SMD133 (AA6023): LQFP-48 (canonically NES 2.0 Mapper 268)
PPU A11 -> / 1 48 \ <- PPU A12 PPU A10 -> / 2 47 \ <- CPU A12 VCC -- / 3 46 \ -> CHR A10 GND -- / 4 45 \ -> CHR A16 CPU A1 -> / 5 44 \ -> CHR A11 PX0 (=$5001.1) <- / 6 43 \ -> CHR A19 CHR A13 <- / 7 42 \ -> CHR A18 CHR A14 <- / 8 41 \ <- CPU D3 CHR A12 <- / 9 SMD133 40 \ <- CPU D2 HV (=?) <- / 10 (AA6023) 39 \ <- CPU D4 CHR A15 <- / 11 38 \ <- CPU D1 CHR A17 <- / 12 37 \ <- CPU D5 PRG A20 <- \ 13 36 / <- CPU D0 IRQ <- \ 14 35 / -> PX1 (=$5001.2) CPU /ROMSEL -> \ 15 34 / <- CPU D6 CPU R/W -> \ 16 33 / <- CPU A0 PRG A15 <- \ 17 32 / <- CPU D7 PRG A13 <- \ 18 31 / -> EXT CSB (=WRAM /CE) CPU A14 -> \ 19 30 / ?? CK18 K5K6 -> \ 20 29 / -- VFL PRG A16 <- \ 21 28 / -- VDD PRG A14 <- \ 22 27 / -> PRG A19 PRG A18 <- \ 23 26 / -> POEB (=PRG /CE) CPU A13 -> \ 24 25 / -> PRG A17
Source: [1]