NES 2.0 Mapper 289: Difference between revisions

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(Created page with "Category:Multicart mappersNES 2.0 Mapper 289 is used for at least two multicarts designated in UNIF as '''BMC-60311C'''. They use 8 KiB of CHR-RAM instead of CHR-ROM. ==M...")
 
(Cleanup, put the outer bank register bits where they belong)
 
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[[Category:Multicart mappers]]NES 2.0 Mapper 289 is used for at least two multicarts designated in UNIF as '''BMC-60311C'''. They use 8 KiB of CHR-RAM instead of CHR-ROM.
{{DEFAULTSORT:289}}[[Category:Multicart mappers]][[Category:Mappers with CHR RAM]]'''NES 2.0 Mapper 289''' is used for at least three multicarts designated in UNIF as '''BMC-60311C'''.
 
*''(EW-16-1) Super HiK 17-in-1''
*''1995 Champion Cassette 1200-in-1 - 94年超值珍藏版''
*''Super 76-in-1'' (with Contra)
==Mode Register ($6000), write==
==Mode Register ($6000), write==
  Mask: probably $E001
  D~[.... MLPP]  Address mask: $E001
        ||++- PRG Banking Mode
7654 3210
        ||    0: NROM-128: PRG A14-A16 from Outer Bank Register
---------
        ||    1: NROM-256: PRG A15-A16 from Outer Bank Register, PRG A14=CPU A14
.... MLPP
        ||    2: UNROM: PRG A14-A16 from Data Latch when CPU A14=0, and 111b when CPU A14=1
      ||++- PRG Banking Mode
        ||    3: PRG A14-16=1 regardless of CPU A14
      ||    0: NROM-128: Same inner/outer 16 KiB bank at CPU $8000-$BFFF and $C000-$FFFF
        |+--- Protect CHR-RAM
      ||    1: NROM-256: 32 kiB bank at CPU $8000-$FFFF (Selected inner/outer bank SHR 1)
        |      0: CHR-RAM writable
      ||    2: UNROM: Inner/outer bank at CPU $8000-BFFF, fixed inner bank 7 within outer bank at $C000-$FFFF
        |      1: CHR-RAM write-protected
      ||    3: Unknown, not used by existing ROM images
        +---- Select nametable mirroring type
      |+--- Disable latch at CPU $8000-$FFFF
                0: Vertical
      |      0: Latch enabled, provides inner 16 KiB bank
                1: Horizontal
      |      1: Latch disabled, inner 16 KiB bank fixed at 0
==Outer Bank Register ($6001), write==
      +---- Select nametable mirroring type
  D~[.QQQ QPPp]  Address mask: $E001
            0: Vertical
    ||| |||+- PRG A14 in NROM-128 PRG Banking Mode
            1: Horizontal
    ||| |++-- PRG A16..15 in NROM-128/-256 Banking Modes
 
    +++-+---- PRG A20..A17
The combined inner/outer bank is simply the inner bank, selected by the latch at $8000-$FFFF (or 0 if the latch is disabled) ORed with the outer bank selected by $6001, without any bit shifting.
==Solder Pad Register ($6000, read)==
 
  D~[.... ..PP]  Address mask: $E000
==Outer Bank Register ($6000), write==
    |||| ||++- Solder pad setting
  Mask: probably $E001
    ++++-++--- Open Bus
==Data Latch ($8000-$FFFF), write==
7654 3210
  D~[.... .PPP]  Address mask: $8000
---------
          +++- PRG A16..14 in UNROM PRG Banking Mode when CPU A14=0
  PPPP PPPP
++++-++++- Select 16 KiB outer PRG-ROM bank
 
==Inner Bank Register ($8000-$FFFF), write==
  Mask: probably $E001
7654 3210
---------
.... .PPP
      +++- Select 16 KiB inneer PRG-ROM bank

Latest revision as of 18:27, 29 December 2022

NES 2.0 Mapper 289 is used for at least three multicarts designated in UNIF as BMC-60311C.

  • (EW-16-1) Super HiK 17-in-1
  • 1995 Champion Cassette 1200-in-1 - 94年超值珍藏版
  • Super 76-in-1 (with Contra)

Mode Register ($6000), write

D~[.... MLPP]  Address mask: $E001
        ||++- PRG Banking Mode
        ||     0: NROM-128: PRG A14-A16 from Outer Bank Register
        ||     1: NROM-256: PRG A15-A16 from Outer Bank Register, PRG A14=CPU A14
        ||     2: UNROM: PRG A14-A16 from Data Latch when CPU A14=0, and 111b when CPU A14=1
        ||     3: PRG A14-16=1 regardless of CPU A14
        |+--- Protect CHR-RAM
        |      0: CHR-RAM writable
        |      1: CHR-RAM write-protected
        +---- Select nametable mirroring type
               0: Vertical
               1: Horizontal

Outer Bank Register ($6001), write

D~[.QQQ QPPp]  Address mask: $E001
    ||| |||+- PRG A14 in NROM-128 PRG Banking Mode
    ||| |++-- PRG A16..15 in NROM-128/-256 Banking Modes
    +++-+---- PRG A20..A17

Solder Pad Register ($6000, read)

D~[.... ..PP]  Address mask: $E000
   |||| ||++- Solder pad setting
   ++++-++--- Open Bus

Data Latch ($8000-$FFFF), write

D~[.... .PPP]  Address mask: $8000
         +++- PRG A16..14 in UNROM PRG Banking Mode when CPU A14=0
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