UNIF/COOLBOY

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Revision as of 01:51, 24 November 2015 by Lidnariq (talk | contribs) (→‎Register interpretation: rewrite ... hopefully clearer. might be too hardware-centric...)
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UNIF MAPR COOLBOY describes a mapper designed for MMC3 multicarts. Unlike almost all other mappers, it is currently being manufactured. (Search for "COOLBOY" on eBay or AliExpress).

It adds four extra registers in lieu of (in addition to?) the normal PRG-RAM, gated by the normal MMC3 PRG-RAM access. FCEUX claims that all four of these registers are cleared on power up and reset.

Registers

Note: Much like with Nintendo's first-party MMC3 multicarts, you MUST enable writes to the MMC3's PRG RAM to write to these registers.

Mask: $E003

$6000

 7  bit  0
 ---- ----
 ABCC DEEE
 |||| ||||
 |||| |+++-- PRG offset (PRG A19, A18, A17)
 |||| +----- Alternate CHR A17
 ||++------- PRG offset (PRG A24, A23)
 |+--------- PRG mask (PRG A17 from 0: MMC3; 1: offset)
 +---------- CHR mask (CHR A17 from 0: MMC3; 1: alternate)

$6001

 7  bit  0
 ---- ----
 GHIJ KKLx
 |||| |||
 |||| ||+--- GNROM mode bank PRG size (1: 32 KiB bank, PRG A14=CPU A14; 0: 16 KiB bank, PRG A14=offset A14)
 |||+-++---- PRG offset (in order: PRG A20, A22, A21)
 ||+-------- PRG mask (PRG A19 from 0: offset; 1: MMC3)
 |+--------- PRG mask (PRG A18 from 0: MMC3; 1: offset)
 +---------- PRG mask (PRG A20 from 0: offset; 1: MMC3)

$6002

 7  bit  0
 ---- ----
 xxxx MMMM
      ||||
      ++++-- CHR offset for GNROM mode (CHR A16, A15, A14, A13)

$6003

 7  bit  0
 ---- ----
 NPxP QQRx
 || | |||
 || | +++--- PRG offset for GNROM mode (PRG A16, A15, A14)
 || +------- 1: GNROM mode; 0: MMC3 mode
 |+-+------- Banking mode
 |+--------- "Weird mode"
 +---------- Lockout (prevent further writes to these four registers, only works when mode = $00 or $40.)

Register interpretation

The following things are always true, regardless of mode:

  • The CCKK bits are always connected to PRG A24..A21.
  • The PRG and CHR mask controls (B, G, H, I, & A) always control whether PRG A20..A17 and CHR A17 are connected to the internal MMC3 registers, or the literal values in other controls (J, EEE, & D).

Banking mode = $00

“Normal” oversize MMC3 mode.

Supports MMC3 anywhere between 128 KiB and 2 MiB, otherwise identical to ordinary MMC3. Goofy mask values will produce goofy memory layouts.

The combined register of CCKKJEEE could be thought of as a way to select one of 256 different 128 KiB PRG MMC3 games, or CCKK selecting one of 16 different 2 MiB MMC3 games.

Lockout works in this mode.

Banking mode = $10

“Normal” GNROM mode.

PRG A16 and A15 always come from the QQ controls.

When in 16 KiB PRG mode (L control), PRG A14 comes from the R control. Otherwise, it comes from CPU A14.

CHR A16, A15, A14, and A13 always come from MMMM controls.

The combined register of CCKKJEEEQQR could be thought of as a way to select one of 2048 different 16 KiB NROM games.

Note: The CHR and PRG mask registers STILL AFFECT THIS MODE, allowing weird splicing of MMC3 banking (with 128 KiB granularity) overlaying GNROM-style banking.

Lockout DOES NOT work in this mode.

Banking mode = $40

“Weird” MMC3 mode.

If MMC3 PRG ROM bank mode is "normal" (8+8+16F), then the PRG banks at 0xC000 and 0xE000 are fixed to 8 KiB bank 0, instead of 0xFE and 0xFF. Supposedly this effect is completely ignored when MMC3 PRG ROM bank mode is inverted (8F+8+8+8F).

The second half of each of the 2 KiB CHR banks is replaced with bank 0, and the LSB of MMC3 registers 0 and 1 work (instead of being replaced by PPU A10).

Otherwise, behaves as “normal” MMC3 mode above.

Banking mode = $50

“Weird” GNROM-ish mode.

Combine the rules mentioned above for “Normal” GNROM mode with “Weird” MMC3 mode. (These descriptions should not be contradictory.)

Lockout DOES NOT work in this mode.