6264 static RAM

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Revision as of 07:25, 23 July 2012 by Lidnariq (talk | contribs) (describe 62256 also)
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The 6264 is an 8kB static RAM, available in 70 to 200 nanosecond access time variants. It can function on both the NES PPU's 8080 style bus (separate /WE and /OE strobes) or on the CPU's 6500 style bus (by grounding /OE and connecting the R/W signal to /WE). The 62256 is similar but has 32kB of RAM instead.

6264 Pinout (62256 in parentheses)

           .----\/----.
(A14) nc - |01      28| - +5V
     A12 - |02      27| - /WE
      A7 - |03      26| - CS2 (A13) 
      A6 - |04      25| - A8      
      A5 - |05      24| - A9      
      A4 - |06      23| - A11       
      A3 - |07      22| - /OE       
      A2 - |08      21| - A10       
      A1 - |09      20| - /CS1    
      A0 - |10      19| - D7      
      D0 - |11      18| - D6      
      D1 - |12      17| - D5      
      D2 - |13      16| - D4      
     GND - |14      15| - D3      
           `----------'

Signal descriptions

A0-A12(-A14)
address
D0-D7
data
/CS1 and (when present) CS2 (chip selects 1 and 2)
when /CS1 is low and CS2 is high, the chip is selected and will accept input or provide output to the data bus.
/WE (write enable)
When the chip is selected, if this pin is low, the eight-bit data D will be written to the address inside the RAM specified by A
/OE (output enable)
When the chip is selected, if this pin is low and /WE is high, the eight bit data in the RAM at address A will be output onto the pins D.

The difference between /OE and the chip selects is that the 6264 responds much faster to /OE, but it draws less power when the chip selects are deasserted.

See also