7432: Difference between revisions
From NESdev Wiki
Jump to navigationJump to search
m (use template) |
Rainwarrior (talk | contribs) m (→Fixed Bank Implementation: formatting) |
||
| (One intermediate revision by the same user not shown) | |||
| Line 5: | Line 5: | ||
== Signal descriptions == | == Signal descriptions == | ||
For each set of pins starting with the same number, Y is high if either A or B are high. | For each set of pins starting with the same number, Y is high if either A or B are high. | ||
== Fixed Bank Implementation == | |||
7432 -- Connection | |||
------------------ | |||
+5V -- +5V | |||
01 -- CPU A14 | |||
02 -- 74161 Q0 | |||
03 -- PRG A14 = CPU A14 OR 74161 Q0 | |||
04 -- CPU A14 | |||
05 -- 74161 Q1 | |||
06 -- PRG A15 = CPU A14 OR 74161 Q1 | |||
09 -- CPU A14 | |||
10 -- 74161 Q2 | |||
08 -- PRG A16 = CPU A14 OR 74161 Q2 | |||
12 -- CPU A14 | |||
13 -- 74161 Q3 | |||
11 -- PRG A17 = CPU A14 OR 74161 Q3 | |||
Gnd -- GND | |||
For a discrete logic mapper, this can be used to provide a fixed bank at $C000-FFFF by overriding a [[74161]] latch output with '''CPU A14''' (e.g. [[UxROM]]). | |||
[[Category:7400 series|032]] | [[Category:7400 series|032]] | ||
Latest revision as of 23:14, 14 December 2022
The 7432 (variants 74LS32, 74HC32) is a 74-series logic IC with four independent 2-input OR gates.
7432 Pinout
.--\/--.
1A -> |01 14| -- +5V
1B -> |02 13| <- 4A
1Y <- |03 12| <- 4B
2A -> |04 11| -> 4Y
2B -> |05 10| <- 3A
2Y <- |06 09| <- 3B
Gnd -- |07 08| -> 3Y
`------'
Signal descriptions
For each set of pins starting with the same number, Y is high if either A or B are high.
Fixed Bank Implementation
7432 -- Connection ------------------ +5V -- +5V 01 -- CPU A14 02 -- 74161 Q0 03 -- PRG A14 = CPU A14 OR 74161 Q0 04 -- CPU A14 05 -- 74161 Q1 06 -- PRG A15 = CPU A14 OR 74161 Q1 09 -- CPU A14 10 -- 74161 Q2 08 -- PRG A16 = CPU A14 OR 74161 Q2 12 -- CPU A14 13 -- 74161 Q3 11 -- PRG A17 = CPU A14 OR 74161 Q3 Gnd -- GND
For a discrete logic mapper, this can be used to provide a fixed bank at $C000-FFFF by overriding a 74161 latch output with CPU A14 (e.g. UxROM).
