Action 53 mapper: Revision history

21 September 2023

• curprev 01:0101:01, 21 September 2023‎ TakuikaNinja talk contribs‎ m 11,241 bytes +4‎ Tweak wording of everynes statement.

20 September 2023

• curprev 21:5221:52, 20 September 2023‎ Tepples talk contribs‎ m 11,237 bytes −230‎ →‎$81: Outer bank: lidnariq suggested a shorter wording
• curprev 20:2220:22, 20 September 2023‎ Tepples talk contribs‎ 11,467 bytes +221‎ →‎$81: Outer bank: replace "presumably" hedge with an explanation of my debugging practice

28 October 2022

• curprev 14:3814:38, 28 October 2022‎ Rainwarrior talk contribs‎ 11,246 bytes +95‎ →‎External links: link the build tool

5 May 2022

• curprev 00:1500:15, 5 May 2022‎ Rainwarrior talk contribs‎ 11,151 bytes +75‎ →‎$81: Outer bank: trying to clarify the bits further
• curprev 00:1100:11, 5 May 2022‎ Rainwarrior talk contribs‎ 11,076 bytes −48‎ →‎$81: Outer bank: revise wording, it's confusing to say that it doesn't do what it doesn't do before clarifying what it actually does do
• curprev 00:0700:07, 5 May 2022‎ Rainwarrior talk contribs‎ m 11,124 bytes −1‎ maximum is only 8MB, i misunderstood the implementation of 256k outer banking

4 May 2022

• curprev 23:1523:15, 4 May 2022‎ Rainwarrior talk contribs‎ m 11,125 bytes +5‎ 32k modes have 512k inner limit
• curprev 23:0623:06, 4 May 2022‎ Rainwarrior talk contribs‎ 11,120 bytes +234‎ infobox

30 April 2022

• curprev 18:2018:20, 30 April 2022‎ Tepples talk contribs‎ 10,886 bytes +139‎ →‎Registers: clarify lack of bus conflicts and in-game use of $81

14 June 2021

• curprev 04:0104:01, 14 June 2021‎ Tepples talk contribs‎ m 10,747 bytes +28‎ →‎See Also: add Notes section
• curprev 03:5803:58, 14 June 2021‎ Tepples talk contribs‎ 10,719 bytes +412‎ →‎Registers: $4444 don exits
• curprev 03:4803:48, 14 June 2021‎ Tepples talk contribs‎ 10,307 bytes +80‎ "is can be?" cheezburger? update MiST/MiSTer A53 link

27 August 2019

• curprev 20:5420:54, 27 August 2019‎ Tepples talk contribs‎ m 10,227 bytes +16‎ →‎Implementation notes: But clarify that the macrocell count was for the 6-bit version
• curprev 20:5220:52, 27 August 2019‎ Tepples talk contribs‎ 10,211 bytes +29‎ →‎Implementation notes: Clarify that "6 bits" here isn't part of the mapper's definition but an implementation detail

29 June 2018

• curprev 07:3907:39, 29 June 2018‎ NovaSquirrel talk contribs‎ m 10,182 bytes +50‎ Added single screen mirroring category

5 June 2018

• curprev 23:1223:12, 5 June 2018‎ Rainwarrior talk contribs‎ 10,132 bytes +59‎ there is one more

16 March 2018

• curprev 04:2904:29, 16 March 2018‎ Tepples talk contribs‎ 10,073 bytes +3‎ →‎External links: test28 is updated

28 February 2017

• curprev 02:1002:10, 28 February 2017‎ Zeromus talk contribs‎ m 10,070 bytes +87‎ →‎Reference implementations: edit bizhawk rSVN to commit hash

11 February 2017

• curprev 15:0315:03, 11 February 2017‎ Rainwarrior talk contribs‎ m 9,983 bytes +3‎ →‎Implementation notes: formatting
• curprev 15:0315:03, 11 February 2017‎ Rainwarrior talk contribs‎ 9,980 bytes +35‎ adding Action 53 manual see also
• curprev 14:5314:53, 11 February 2017‎ Rainwarrior talk contribs‎ 9,945 bytes +136‎ merging some info from iNES mapper 028

9 June 2016

• curprev 15:5615:56, 9 June 2016‎ Tepples talk contribs‎ m 9,809 bytes +32‎ Mainspace is not currently configured to allow use of subpages
• curprev 15:5515:55, 9 June 2016‎ Tepples talk contribs‎ 9,777 bytes +196‎ →‎Registers: Use consistent wording so as not to imply that D4 of $00/$01 have a separate state bit from D0 of $80; recognize wider implementation of NES 2.0
• curprev 15:3215:32, 9 June 2016‎ Tepples talk contribs‎ m 9,581 bytes 0‎ Tepples moved page User:Tepples/Multi-discrete mapper to Action 53 mapper: As far as I can tell, this has become the accepted name for this MMC1-class multicart mapper

9 May 2016

• curprev 13:3613:36, 9 May 2016‎ Tepples talk contribs‎ 9,581 bytes +200‎ →‎Implementation notes: INL says muxed outputs also cost a cell, which predicts the 7 extra cells quite well. Also begin to make oversize extension official now that NES 2.0 support is growing

6 March 2016

• curprev 01:2301:23, 6 March 2016‎ Jwdonal talk contribs‎ m 9,381 bytes +3‎ The source file linked is written in Verilog, not VHDL.
• curprev 01:1201:12, 6 March 2016‎ Tepples talk contribs‎ 9,378 bytes +174‎ →‎Verilog Code: thanks fys

12 October 2015

• curprev 02:5402:54, 12 October 2015‎ Tepples talk contribs‎ 9,204 bytes +209‎ →‎Power up state: Reset stub; mark parts as non-normative

16 June 2015

• curprev 02:5902:59, 16 June 2015‎ Tepples talk contribs‎ 8,995 bytes −65‎ prepare for removal of wannabe-Disch page

28 June 2014

• curprev 11:1211:12, 28 June 2014‎ Tepples talk contribs‎ 9,060 bytes +114‎ →‎Implementation notes: Comprehensive test

27 June 2014

• curprev 16:2416:24, 27 June 2014‎ Tepples talk contribs‎ 8,946 bytes +94‎ →‎$5000: Register select: Switchable mirroring

12 January 2014

• curprev 23:0023:00, 12 January 2014‎ Tepples talk contribs‎ 8,852 bytes +85‎ →‎$80: Mode: logic table

22 July 2013

• curprev 04:2504:25, 22 July 2013‎ Tepples talk contribs‎ m 8,767 bytes +612‎ →‎$80: Mode: Distinguish o and i from 0 and 1 more clearly

19 July 2013

• curprev 18:3018:30, 19 July 2013‎ Tepples talk contribs‎ m 8,155 bytes +39‎ Writing only to $5000 and $8xxx should allow this mapper to work on Vs. without confusing the coin counter output

6 January 2013

• curprev 00:5500:55, 6 January 2013‎ Tepples talk contribs‎ 8,116 bytes +122‎ →‎Verilog Code: link to map1c binary for powerpak

12 November 2012

• curprev 02:2302:23, 12 November 2012‎ Quietust talk contribs‎ 7,994 bytes +138‎ →‎$80: Mode: clarification

4 November 2012

• curprev 23:2323:23, 4 November 2012‎ Tepples talk contribs‎ 7,856 bytes 0‎ →‎$80: Mode: major thinko: mode 2 and 3 were swapped here
• curprev 23:0623:06, 4 November 2012‎ Tepples talk contribs‎ 7,856 bytes +143‎ →‎$01: Inner bank: Clarify further that D4 is ignored
• curprev 04:3404:34, 4 November 2012‎ Tepples talk contribs‎ 7,713 bytes +678‎ →‎$81: Outer bank: Oversize extension; clarify further the lack of barrel shifting

3 November 2012

• curprev 03:0303:03, 3 November 2012‎ Tepples talk contribs‎ 7,035 bytes +77‎ be even more explicit
• curprev 03:0003:00, 3 November 2012‎ Tepples talk contribs‎ 6,958 bytes +130‎ →‎$80: Mode: Again, trying to use what makes sense to kevtris in hopes that it'll make sense to others: One bit accessible in three places
• curprev 02:2602:26, 3 November 2012‎ Tepples talk contribs‎ 6,828 bytes +174‎ →‎$80: Mode: After more discussion with kev, I think putting how the bits are combined in each of the 12 modes might be a better choice
• curprev 02:0402:04, 3 November 2012‎ Tepples talk contribs‎ 6,654 bytes +125‎ →‎$80: Mode: kevtris wants me to repeat myself
• curprev 01:2701:27, 3 November 2012‎ Tepples talk contribs‎ 6,529 bytes +2‎ →‎$80: Mode: reclarification
• curprev 01:2501:25, 3 November 2012‎ Tepples talk contribs‎ 6,527 bytes +128‎ →‎$01: Inner bank: on IRC, kevtris requested clarification

14 October 2012

• curprev 16:0516:05, 14 October 2012‎ Tepples talk contribs‎ 6,399 bytes +262‎ →‎Verilog Code: About to add reference implementations that I created as part of a test ROM project
• curprev 03:1203:12, 14 October 2012‎ Tepples talk contribs‎ 6,137 bytes −6,674‎ new section: Power up state; split Verilog to another article
• curprev 02:2802:28, 14 October 2012‎ Tepples talk contribs‎ 12,811 bytes +270‎ →‎Implementation notes: Begin pin counts per talk

7 October 2012

• curprev 01:4001:40, 7 October 2012‎ Infiniteneslives talk contribs‎ 12,541 bytes +1,110‎ →‎Verilog Code: restructured UNROM versions' code

6 October 2012

• curprev 20:1020:10, 6 October 2012‎ Tepples talk contribs‎ 11,431 bytes +203‎ →‎Verilog Code: I don't know Verilog, but I think this is what I mean
• curprev 19:4919:49, 6 October 2012‎ Tepples talk contribs‎ 11,228 bytes +452‎ Clarify my intent as to the fixed bank behavior
• curprev 18:1318:13, 6 October 2012‎ Infiniteneslives talk contribs‎ 10,776 bytes +145‎ →‎Implementation notes: corrected consumption after bank switch correction, added optional feature consumptions.
• curprev 18:1118:11, 6 October 2012‎ Infiniteneslives talk contribs‎ 10,631 bytes +1,060‎ →‎Verilog Code: corrected prg bankswitching error, added wram control, other minor changes
• curprev 09:2409:24, 6 October 2012‎ Infiniteneslives talk contribs‎ m 9,571 bytes −8‎ →‎Verilog Code: corrected errors in comments.
• curprev 09:2109:21, 6 October 2012‎ Infiniteneslives talk contribs‎ 9,579 bytes +4,910‎ Added verilog code for design implementation and notes about actual consumed logic.

4 October 2012

• curprev 21:1121:11, 4 October 2012‎ Tepples talk contribs‎ m 4,669 bytes +31‎ cat

3 October 2012

• curprev 14:4714:47, 3 October 2012‎ Tepples talk contribs‎ 4,638 bytes +141‎ →‎$80: Mode: finish table
• curprev 14:4014:40, 3 October 2012‎ Tepples talk contribs‎ 4,497 bytes +125‎ →‎$80: Mode: ok, wtf? fix end of table (which didn't show up on preview) and start to add rationales for the fixed banks
• curprev 14:3714:37, 3 October 2012‎ Tepples talk contribs‎ 4,372 bytes +912‎ →‎$80: Mode: begin mirroring mode examples table (75% done; to be finished later)
• curprev 11:4411:44, 3 October 2012‎ Tepples talk contribs‎ 3,460 bytes +23‎ →‎$80: Mode: In an earlier draft, I had the regs in more or less MMC1 order, before I discovered the difference between a supervisor reg and a user reg, but one table escaped renumbering.

2 October 2012

• curprev 16:2516:25, 2 October 2012‎ Tepples talk contribs‎ 3,437 bytes +186‎ →‎Configurations: Another possibility: BNROM oversize (for A53ception)
• curprev 16:2216:22, 2 October 2012‎ Tepples talk contribs‎ 3,251 bytes +3,251‎ for INL