CPU Test Mode: Revision history

15 October 2023

• curprev 03:1003:10, 15 October 2023‎ Lidnariq talk contribs‎ m 2,613 bytes −83‎ we do know that 2A03E pin 30 is /RDY

19 July 2023

• curprev 22:0022:00, 19 July 2023‎ Fiskbit talk contribs‎ 2,696 bytes +833‎ Adds more 2A03G/H test pin information.

18 July 2023

• curprev 20:4020:40, 18 July 2023‎ Lidnariq talk contribs‎ 1,863 bytes +151‎ →‎2A03E: pin 30 is /rdy

10 September 2022

• curprev 23:0523:05, 10 September 2022‎ Fiskbit talk contribs‎ 1,712 bytes −1,144‎ Removes the 2A03 PIT information (now on its own page). Notes 2A03 pin 30 does nothing.

9 September 2022

• curprev 12:3012:30, 9 September 2022‎ Quietust talk contribs‎ m 2,856 bytes −1‎ make this less confusing

3 September 2022

• curprev 03:1103:11, 3 September 2022‎ Lidnariq talk contribs‎ m 2,857 bytes +1‎ 2C07A, not 2C07letterless
• curprev 03:1003:10, 3 September 2022‎ Quietust talk contribs‎ m 2,856 bytes +29‎ →‎2A07: it's hard to tell from the die images we have, but if pin 30 is normally grounded then the internal signal would have to be inverted
• curprev 03:0503:05, 3 September 2022‎ Quietust talk contribs‎ m 2,827 bytes +71‎ →‎2A07

2 September 2022

• curprev 18:5518:55, 2 September 2022‎ Lidnariq talk contribs‎ 2,756 bytes +129‎ new § 2A07

15 November 2021

• curprev 05:0605:06, 15 November 2021‎ Lidnariq talk contribs‎ 2,627 bytes +40‎ →‎2A03E ???

14 November 2021

• curprev 03:1003:10, 14 November 2021‎ Lidnariq talk contribs‎ 2,587 bytes +61‎ →‎2A03E / 2A03G Test Mode: no test mode in 2A03E

21 January 2021

• curprev 19:5119:51, 21 January 2021‎ Lidnariq talk contribs‎ m 2,526 bytes +48‎ →‎2A03E / 2A03G Test Mode: reflow text so that it's not wider that my screen
• curprev 16:2116:21, 21 January 2021‎ Quietust talk contribs‎ m 2,478 bytes +5‎ No edit summary
• curprev 16:2016:20, 21 January 2021‎ Quietust talk contribs‎ m 2,473 bytes +4‎ The bottom 5 bits of W$401A don't set the "instant phase" - they set the state of the triangle's Sequencer (i.e. $07 and $18 will result in the same effective output)
• curprev 15:5815:58, 21 January 2021‎ Quietust talk contribs‎ 2,469 bytes +35‎ Setting $401A.7 makes the pulse and noise channels output their current volume (even if disabled via length counter), pauses the triangle channel's counter, and stops DPCM from counting up or down

6 September 2018

• curprev 22:5422:54, 6 September 2018‎ Lidnariq talk contribs‎ m 2,434 bytes +28‎ →‎2A03letterless Programmable Interval Timer: clarify what happens when no automatic reload

4 September 2018

• curprev 18:4318:43, 4 September 2018‎ Lidnariq talk contribs‎ 2,406 bytes 0‎ →‎2A03letterless Programmable Interval Timer: typo
• curprev 17:3417:34, 4 September 2018‎ Lidnariq talk contribs‎ 2,406 bytes +1,672‎ Add this. How exactly does W$401A's lock work?

10 July 2016

• curprev 13:3513:35, 10 July 2016‎ Quietust talk contribs‎ 734 bytes +91‎ APU test mode is only present in the 2A03G (and possibly some earlier revisions), and the IRQ counter was only present in the original 2A03 (where pin 30 did nothing at all).

8 July 2016

• curprev 18:2618:26, 8 July 2016‎ Rainwarrior talk contribs‎ m 643 bytes +31‎ thread seems to have two coexisting titles
• curprev 18:1018:10, 8 July 2016‎ Rainwarrior talk contribs‎ 612 bytes +329‎ more references, stub material
• curprev 18:0118:01, 8 July 2016‎ Rainwarrior talk contribs‎ m 283 bytes +4‎ formatting
• curprev 18:0018:00, 8 July 2016‎ Rainwarrior talk contribs‎ 279 bytes +279‎ creating stub