CPU variants: Difference between revisions

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(Eugene.S PMed me some extra information to put here)
(+found difference between early and newer UA6527P)
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| UA6527P || UMC-made clone of 2A03G for compatibility with NTSC software in PAL countries. input clock divider is 15. Otherwise believed same as 6527.
| UA6527P || UMC-made clone of 2A03G for compatibility with NTSC software in PAL countries. input clock divider is 15. Otherwise believed same as 6527.
Two revisions exist: before mid-1990 (which has UMC logo on left) and after-mid-1990 (which has UMC logo on top). It is said that old UMC CPU has broken DMC reader function [https://forums.nesdev.org/viewtopic.php?t=13024&p=151220]. At least some of CodeMasters' games behave differently on them.
Two revisions exist: before mid-1990 (which has UMC logo on left) and after-mid-1990 (which has UMC logo on top). It is said that old UMC CPU has broken DMC reader function [https://forums.nesdev.org/viewtopic.php?t=13024&p=151220].
Addidionally it has input clock divider equals to 16 in contrary to the 15 present in newer one, that would explain why some games work differently (for example: CodeMasters' titles)


[[File:Ua6527p old.png]] [[File:Ua6527p new.png]]
[[File:Ua6527p old.png]] [[File:Ua6527p new.png]]

Revision as of 12:53, 20 February 2020

Beyond the well-studied 2A03G, we know of the following CPU revisions, both made by Ricoh and other manufacturers:

RP2A03 M2 duty cycle is 3/4 instead of 5/8. Lacks tonal noise mode. Has broken and disabled programmable interval timer on-die. Other differences?
RP2A03E no known differences
RP2A03G reference model
RP2A03H no known differences
RP2A04 Not actually a CPU at all, just a jumper in a 40-pin PDIP
RP2A07 input clock divider is 16. Changes to noise, DPCM, frame timer tables. Fixed DPCM RDY address bus glitches. Other differences?
RP2A07A no known differences relative to 2A07letterless
MG-P-501 Micro Genius-made clone. No specifics known.
UA6527 UMC-made clone of 2A03G. Has swapped pulse channel duty cycles.
UA6527P UMC-made clone of 2A03G for compatibility with NTSC software in PAL countries. input clock divider is 15. Otherwise believed same as 6527.

Two revisions exist: before mid-1990 (which has UMC logo on left) and after-mid-1990 (which has UMC logo on top). It is said that old UMC CPU has broken DMC reader function [1]. Addidionally it has input clock divider equals to 16 in contrary to the 15 present in newer one, that would explain why some games work differently (for example: CodeMasters' titles)

Ua6527p old.png Ua6527p new.png

UA6540 UMC-made clone of 2A07 [2]. Has swapped pulse duty cycles.
UM6557 Believed to be a 100% duplicate of UA6527, for use in SECAM regions.
UM6561xx-1 NES-on-a-chip for NTSC. Revisions "xx" AF, BF, CF, F known. Earlier revisions (which?) CPU half believed identical to UA6527; later revisions correct pulse channel duties.
UM6561xx-2 NES-on-a-chip for PAL-B. Revisions "xx" AF, BF, CF, F known. Earlier revisions (which?) CPU half believed identical to UA6527P; later revisions correct pulse channel duties.
T1818 ??-made NES-on-a-chip, NTSC timing. Believed to exist, but evidence currently scant.
T1818P ??-made NES-on-a-chip[[3]. Requires external 2 KiB RAMs for CPU and PPU. Swapped pulse duty cycles.
TA-03N ??-made clone of 2A03G
TA-03NP ??-made clone of 2A03G for NTSC compatibility in PAL countries. Input clock divider is 15.
TA-03NP1 ??-made clone of 2A03G for NTSC compatibility in PAL countries. Input clock divider is 15. Fixed DPCM problems?
PM03 Gradiente-made clone of 2A03G. [4]

If you know of other differences or other revisions, please add them!

See also