File:2a03 map.jpg: Difference between revisions

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(A rough diagram of where everything is physically located on the RP2A03G. The clock divider, not highlighted, is at the far right. The purpose of the large section at the upper right is not known - none of it has any connection to anything else.)
 
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A rough diagram of where everything is physically located on the RP2A03G.
A rough diagram of where everything is physically located on the RP2A03G. The clock divider, not highlighted, is at the far right.
The clock divider, not highlighted, is at the far right.
 
The purpose of the large section at the upper right is not known - none of it has any connection to anything else.
The large section at the upper right appears to be a test pattern, used for measuring the characteristics of transistors of various lengths, widths, and types (enhancement versus [[wikipedia:Depletion-load NMOS logic|depletion]]).
 
The sections marked "Square0/Square1/Noise Position", upon closer investigation, are actually the Envelope counters.
 
 
Detailed images of each layer of the die can be found [https://www.qmtpro.com/~nes/chipimages/#rp2a03 here], including a more detailed version of this image as an overlay - these can potentially be used to build a netlist of everything but the 6502.

Latest revision as of 13:37, 17 May 2021

A rough diagram of where everything is physically located on the RP2A03G. The clock divider, not highlighted, is at the far right.

The large section at the upper right appears to be a test pattern, used for measuring the characteristics of transistors of various lengths, widths, and types (enhancement versus depletion).

The sections marked "Square0/Square1/Noise Position", upon closer investigation, are actually the Envelope counters.


Detailed images of each layer of the die can be found here, including a more detailed version of this image as an overlay - these can potentially be used to build a netlist of everything but the 6502.

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