INES Mapper 028
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iNES Mapper 028 is assigned to a multicart mapper developed by Tepples and Infiniteneslives in October 2012, as an extension of the Action 53 project to cover CNROM and UNROM games. It is used for STREEMERZ: Action 53 Function 16 Volume One.
Implemented in FCEUX as of r2739 (tracking bug) but appears to have been dropped sometime between 2.2.0 and 2.2.1. Implemented in Bizhawk as of r3680.
Disch
Aping Disch's style:
========================
= Mapper 028 =
========================
aka
--------------------------
Multi-discrete
Example Games:
--------------------------
STREEMERZ: Action 53 Function 16 Volume One
Notes:
--------------------------
This mapper is designed for making multicarts of games that
use NROM, CNROM, UNROM, BNROM, or AOROM. It looks like the
love child of MMC3, MMC1, and the Nintendo discrete mappers.
It has separate address and data ports like MMC3 (and FME-7),
its mode register is laid out in a way reminiscent of MMC1,
and it has the data port at $8000-$FFFF for compatibility with
the discrete mappers that it is designed to simulate.
Registers:
--------------------------
Range,Mask: $5000-$5FFF, $1000
$5000: [A... ...A] Address for use with $8000
Range,Mask: $8000-$FFFF, $8000
$8000: [..DD DDDD] Data port
R:$00 -> CHR Reg
R:$01 -> PRG Reg
R:$80 -> Mode
R:$81 -> Outer PRG Reg
These registers are internal, written through the data port:
R:$00: [...M ..CC]
C = CHR Reg
M = Mirroring
This bit overwrites bit 0 of R:$80, but only if bit 1 of
R:$80 is clear
R:$01: [...M PPPP]
P = PRG Reg
M = Mirroring
This bit overwrites bit 0 of R:$80, but only if bit 1 of
R:$80 is clear
R:$80: [..GG PSMM]
G = Game Size (0=32K, 1=64K, 2=128K, 3=256K)
P = PRG Size (0=32k mode, 1=16k mode)
S = Slot select:
0 = $C000 swappable, $8000 fixed to bottom of 32K outer bank
1 = $8000 swappable, $C000 fixed to top of 32K outer bank
This bit is ignored when 'P' is clear (32k mode)
M = Mirroring control:
%00 = 1ScA
%01 = 1ScB
%10 = Vert
%11 = Horz
R:$81: [..BB BBBB]
Outer PRG Reg
CHR Setup:
---------------------------
$0000 $0400 $0800 $0C00 $1000 $1400 $1800 $1C00
+---------------------------------------------------------------+
| <R:$00> |
+---------------------------------------------------------------+
PRG Setup:
---------------------------
There is 1 PRG reg and 3 PRG modes, corresponding to mappers 34, 2,
and 180. PRG banks are shifted; when P=0, bank numbers are from 0
to 7, and when P=1, bank numbers are from 0 to F.
$8000 $A000 $C000 $E000
+-------------------------------+
P=0: | R:$01 |
+-------------------------------+
P=1, S=0: | >R:$81<* | R:$01 |
+---------------+---------------+
P=1, S=1: | R:$01 | >R:$81<* |
+---------------+---------------+
* These represent the first and second half of the outer bank,
as if temporarily forcing P=0 and G=0.
The 4-bit output from this phase is fed into the multicart logic.
It's ANDed with inner-AND, and the outer bank number is shifted
left by 1 (always 1, not depending on G) and ANDed with outer-AND
to form inner-OR.
'G' Block size Inner-AND Outer-AND
----------------------------------------
0 32K $01 $7E
1 64K $03 $7C
2 128K $07 $78
3 256K $0F $70
Powerup and Reset:
---------------------------
The last 16K PRG bank is switched in on powerup.
Registers are unchanged on reset.
