INES Mapper 043: Difference between revisions

From NESdev Wiki
Jump to navigationJump to search
 
(9 intermediate revisions by 3 users not shown)
Line 1: Line 1:
{{DEFAULTSORT:043}}[[Category:iNES Mappers]][[Category:FDS conversion mappers]][[Category:Mappers with cycle IRQs]]iNES Mapper 043 is used for Whirlwind Manu's second attempt (cartridge number LF36) at converting ''Super Mario Bros. 2'' from the Famicom Disk System to a ROM cartridge. Their first attempt (cartridge number LE10, [[NES 2.0 Mapper 304]]) hangs after completing level 4-4. Its UNIF board name is '''UNL-SMB2J''', along with several incompatible boards annoyingly all carrying the same UNIF MAPR.
{{DEFAULTSORT:043}}[[Category:iNES Mappers]][[Category:FDS conversion mappers]][[Category:Mappers with fixed-timing cycle IRQs]]'''iNES Mapper 043''' is used for the '''TONY-I''' and '''YS-612''' circuit boards, both containing conversions of ''Super Mario Brothers 2'' (Japanese) from Famicom Disk System to ROM cartridge. There are two 32 KiB, one 2 KiB and one 8 KiB PRG-ROM chip. iNES-format ROM images first include the data of both 32 KiB ROM chips, then the data of the 2 KiB chip repeated four times, then the data of the 8 KiB ROM chip, for a total of 80 KiB of PRG-ROM.


=Banks=
=Banks=
* CPU $5000-$5FFF: 4 KiB PRG-ROM bank, fixed to #16 or #17 depending on DIP switch value (determines whether the title screen has the SMB2 logo or not)
* CPU $5000-$5FFF: 2 KiB PRG-ROM bank, repeated once, from 2 KiB PRG-ROM chip
* CPU $6000-$7FFF: 8 KiB PRG-ROM bank, fixed to #2
* CPU $6000-$7FFF: 8 KiB PRG-ROM bank, fixed to #2, from 2x32 KiB PRG-ROM chips
* CPU $8000-$9FFF: 8 KiB PRG-ROM bank, fixed to #1
* CPU $8000-$9FFF: 8 KiB PRG-ROM bank, fixed to #1, from 2x32 KiB PRG-ROM chips
* CPU $A000-$BFFF: 8 KiB PRG-ROM bank, fixed to #0
* CPU $A000-$BFFF: 8 KiB PRG-ROM bank, fixed to #0, from 2x32 KiB PRG-ROM chips
* CPU $C000-$DFFF: 8 KiB PRG-ROM bank, switchable
* CPU $C000-$DFFF: 8 KiB PRG-ROM bank, switchable, from 2x32 KiB PRG-ROM chips
* CPU $E000-$FFFF: 8 KiB PRG-ROM bank, fixed to #9
* CPU $E000-$FFFF: 8 KiB PRG-ROM bank from 8 KiB PRG-ROM chip
* PPU $0000-$1FFF: unbanked 8 KiB CHR-ROM
* PPU $0000-$1FFF: unbanked 8 KiB CHR-ROM


Line 31: Line 31:
  7      6
  7      6


==IRQ Control ($8122)==
==IRQ Control ($4122 on TONY-I, $8122 on YS-612)==
  Mask: $71FF
  Mask: $71FF?
   
   
  Bit 7654 3210
  Bit 7654 3210
     ---------
     ---------
     .... ..II
     .... ...I
            ++- 0: Acknowledge and disable IRQ, reset counter
            +- 0: Acknowledge and disable IRQ, reset counter
                 1-3: Enable IRQ
                 1: Enable IRQ


When enabled, the 12-bit IRQ counter increases on every M2 cycle until it overflows, upon which an IRQ is fired.
When enabled, the 12-bit IRQ counter increases on every M2 cycle until it overflows, upon which an IRQ is fired.
=Notes=
* FCEUX emulates a multicart extract of ''Mr. Mary 2'' under this mapper number. Since that particular SMB2J conversion was never released in single-cartridge form, its description of is part of the [[NES 2.0 Mapper 357|multicarts' description]].
* A modified iNES ROM file of YS-612 has different title screen variants in the four representations of the 2 KiB ROM chip. Nintendulator implements a dialog to switch between two of them.

Latest revision as of 22:24, 26 August 2019

iNES Mapper 043 is used for the TONY-I and YS-612 circuit boards, both containing conversions of Super Mario Brothers 2 (Japanese) from Famicom Disk System to ROM cartridge. There are two 32 KiB, one 2 KiB and one 8 KiB PRG-ROM chip. iNES-format ROM images first include the data of both 32 KiB ROM chips, then the data of the 2 KiB chip repeated four times, then the data of the 8 KiB ROM chip, for a total of 80 KiB of PRG-ROM.

Banks

  • CPU $5000-$5FFF: 2 KiB PRG-ROM bank, repeated once, from 2 KiB PRG-ROM chip
  • CPU $6000-$7FFF: 8 KiB PRG-ROM bank, fixed to #2, from 2x32 KiB PRG-ROM chips
  • CPU $8000-$9FFF: 8 KiB PRG-ROM bank, fixed to #1, from 2x32 KiB PRG-ROM chips
  • CPU $A000-$BFFF: 8 KiB PRG-ROM bank, fixed to #0, from 2x32 KiB PRG-ROM chips
  • CPU $C000-$DFFF: 8 KiB PRG-ROM bank, switchable, from 2x32 KiB PRG-ROM chips
  • CPU $E000-$FFFF: 8 KiB PRG-ROM bank from 8 KiB PRG-ROM chip
  • PPU $0000-$1FFF: unbanked 8 KiB CHR-ROM

Registers

PRG Bank Select ($4022)

Mask: $71FF

Bit 7654 3210
    ---------
    .... .CCC
          +++- Select 8 KiB PRG-ROM bank at CPU $C000-$DFFF.

The actual bank number is:

Value  Bank#
------------
0      4
1      3
2      4
3      4
4      4
5      7
6      5
7      6

IRQ Control ($4122 on TONY-I, $8122 on YS-612)

Mask: $71FF?

Bit 7654 3210
    ---------
    .... ...I
            +- 0: Acknowledge and disable IRQ, reset counter
               1: Enable IRQ

When enabled, the 12-bit IRQ counter increases on every M2 cycle until it overflows, upon which an IRQ is fired.

Notes

  • FCEUX emulates a multicart extract of Mr. Mary 2 under this mapper number. Since that particular SMB2J conversion was never released in single-cartridge form, its description of is part of the multicarts' description.
  • A modified iNES ROM file of YS-612 has different title screen variants in the four representations of the 2 KiB ROM chip. Nintendulator implements a dialog to switch between two of them.