INES Mapper 043: Difference between revisions

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{{DEFAULTSORT:043}}[[Category:iNES Mappers]][[Category:FDS conversion mappers]][[Category:Mappers with cycle IRQs]]iNES Mapper 043 is used for two conversions of ''Super Mario Bros. 2'' (Japanese) from Famicom Disk System to ROM cartridge:
{{DEFAULTSORT:043}}[[Category:iNES Mappers]][[Category:FDS conversion mappers]][[Category:Mappers with fixed-timing cycle IRQs]]'''iNES Mapper 043''' is used for the '''TONY-I''' and '''YS-612''' circuit boards, both containing conversions of ''Super Mario Brothers 2'' (Japanese) from Famicom Disk System to ROM cartridge. There are two 32 KiB, one 2 KiB and one 8 KiB PRG-ROM chip. iNES-format ROM images first include the data of both 32 KiB ROM chips, then the data of the 2 KiB chip repeated four times, then the data of the 8 KiB ROM chip, for a total of 80 KiB of PRG-ROM.
* Whirlwind Manu's second attempt (cartridge number LF36) at converting the game. Their first attempt (cartridge number LE10, [[NES 2.0 Mapper 304]]) [https://archive.org/details/youtube-M2-ovBQW978 hangs on real hardware] after completing level 4-4.
* A version named ''Mr. Mary 2'' by BIT Corporation.
FCEUX manages to emulate both under the same iNES mapper number. Their UNIF board name is '''UNL-SMB2J''', along with several incompatible boards annoyingly all carrying the same UNIF MAPR.


=Banks=
=Banks=
==Whirlwind Manu LF36==
* CPU $5000-$5FFF: 2 KiB PRG-ROM bank, repeated once, from 2 KiB PRG-ROM chip
* CPU $5000-$5FFF: 4 KiB PRG-ROM bank, fixed to #16 or #17 depending on DIP switch setting (determines whether the title screen has the SMB2 logo or not)
* CPU $6000-$7FFF: 8 KiB PRG-ROM bank, fixed to #2, from 2x32 KiB PRG-ROM chips
* CPU $6000-$7FFF: 8 KiB PRG-ROM bank, fixed to #2
* CPU $8000-$9FFF: 8 KiB PRG-ROM bank, fixed to #1, from 2x32 KiB PRG-ROM chips
* CPU $8000-$9FFF: 8 KiB PRG-ROM bank, fixed to #1
* CPU $A000-$BFFF: 8 KiB PRG-ROM bank, fixed to #0, from 2x32 KiB PRG-ROM chips
* CPU $A000-$BFFF: 8 KiB PRG-ROM bank, fixed to #0
* CPU $C000-$DFFF: 8 KiB PRG-ROM bank, switchable, from 2x32 KiB PRG-ROM chips
* CPU $C000-$DFFF: 8 KiB PRG-ROM bank, switchable
* CPU $E000-$FFFF: 8 KiB PRG-ROM bank from 8 KiB PRG-ROM chip
* CPU $E000-$FFFF: 8 KiB PRG-ROM bank, fixed to #9
* PPU $0000-$1FFF: unbanked 8 KiB CHR-ROM
* PPU $0000-$1FFF: unbanked 8 KiB CHR-ROM
==Mr. Mary 2==
* CPU $5000-$5FFF: 4 KiB PRG-ROM bank, fixed to #16
* CPU $6000-$7FFF: 8 KiB PRG-ROM bank, [[#PRG_Bank_Select_2_.28.244120.2C_Mr._Mary_2_only.29|switchable to #2 or #0]]
* CPU $8000-$9FFF: 8 KiB PRG-ROM bank, fixed to #1
* CPU $A000-$BFFF: 8 KiB PRG-ROM bank, fixed to #0
* CPU $C000-$DFFF: 8 KiB PRG-ROM bank, switchable
* CPU $E000-$FFFF: 8 KiB PRG-ROM bank, [[#PRG_Bank_Select_2_.28.244120.2C_Mr._Mary_2_only.29|switchable to #10/#9 or #8]]
* PPU $0000-$1FFF: unbanked 8 KiB CHR-RAM


=Registers=
=Registers=
==PRG Bank Select 1 ($4022)==
==PRG Bank Select ($4022)==
  Mask: probably $71FF
  Mask: $71FF
   
   
  Bit 7654 3210
  Bit 7654 3210
Line 36: Line 24:
  0      4
  0      4
  1      3
  1      3
  2      5
  2      4
  3      3
  3      4
  4      6
  4      4
  5      3
  5      7
  6      7
  6      5
  7      3
  7      6


==PRG Bank Select 2 ($4120, Mr. Mary 2 only)==
==IRQ Control ($4122 on TONY-I, $8122 on YS-612)==
Mask: probably $71FF
  Mask: $71FF?
Bit 7654 3210
    ---------
    .... ...I
            +- 0: CPU $6000-$7FFF to bank 2,
                  CPU $E000-$FFFF to bank 10 (128 KiB ROM image)/9 (80 KiB ROM image)
                1: CPU $6000-$7FFF to bank 0,
                  CPU $E000-$FFFF to bank 8
 
[https://github.com/TASVideos/fceux/blob/master/src/boards/43.cpp FCEUX' source code] claims that the actual hardware switches $E000-$FFFF to bank 10, used with an original 128 KiB ROM image, and that CaH4e3's released iNES ROM image of the game removes repeated banks to yield an 80 KiB ROM image that needs to switch to bank 9 instead.
 
==IRQ Control ($4122/$8122)==
  Mask: probably $F1FF
   
   
  Bit 7654 3210
  Bit 7654 3210
Line 66: Line 41:


When enabled, the 12-bit IRQ counter increases on every M2 cycle until it overflows, upon which an IRQ is fired.
When enabled, the 12-bit IRQ counter increases on every M2 cycle until it overflows, upon which an IRQ is fired.
=Notes=
* FCEUX emulates a multicart extract of ''Mr. Mary 2'' under this mapper number. Since that particular SMB2J conversion was never released in single-cartridge form, its description of is part of the [[NES 2.0 Mapper 357|multicarts' description]].
* A modified iNES ROM file of YS-612 has different title screen variants in the four representations of the 2 KiB ROM chip. Nintendulator implements a dialog to switch between two of them.

Latest revision as of 22:24, 26 August 2019

iNES Mapper 043 is used for the TONY-I and YS-612 circuit boards, both containing conversions of Super Mario Brothers 2 (Japanese) from Famicom Disk System to ROM cartridge. There are two 32 KiB, one 2 KiB and one 8 KiB PRG-ROM chip. iNES-format ROM images first include the data of both 32 KiB ROM chips, then the data of the 2 KiB chip repeated four times, then the data of the 8 KiB ROM chip, for a total of 80 KiB of PRG-ROM.

Banks

  • CPU $5000-$5FFF: 2 KiB PRG-ROM bank, repeated once, from 2 KiB PRG-ROM chip
  • CPU $6000-$7FFF: 8 KiB PRG-ROM bank, fixed to #2, from 2x32 KiB PRG-ROM chips
  • CPU $8000-$9FFF: 8 KiB PRG-ROM bank, fixed to #1, from 2x32 KiB PRG-ROM chips
  • CPU $A000-$BFFF: 8 KiB PRG-ROM bank, fixed to #0, from 2x32 KiB PRG-ROM chips
  • CPU $C000-$DFFF: 8 KiB PRG-ROM bank, switchable, from 2x32 KiB PRG-ROM chips
  • CPU $E000-$FFFF: 8 KiB PRG-ROM bank from 8 KiB PRG-ROM chip
  • PPU $0000-$1FFF: unbanked 8 KiB CHR-ROM

Registers

PRG Bank Select ($4022)

Mask: $71FF

Bit 7654 3210
    ---------
    .... .CCC
          +++- Select 8 KiB PRG-ROM bank at CPU $C000-$DFFF.

The actual bank number is:

Value  Bank#
------------
0      4
1      3
2      4
3      4
4      4
5      7
6      5
7      6

IRQ Control ($4122 on TONY-I, $8122 on YS-612)

Mask: $71FF?

Bit 7654 3210
    ---------
    .... ...I
            +- 0: Acknowledge and disable IRQ, reset counter
               1: Enable IRQ

When enabled, the 12-bit IRQ counter increases on every M2 cycle until it overflows, upon which an IRQ is fired.

Notes

  • FCEUX emulates a multicart extract of Mr. Mary 2 under this mapper number. Since that particular SMB2J conversion was never released in single-cartridge form, its description of is part of the multicarts' description.
  • A modified iNES ROM file of YS-612 has different title screen variants in the four representations of the 2 KiB ROM chip. Nintendulator implements a dialog to switch between two of them.