INES Mapper 052: Difference between revisions

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(Rewrite for brevity; describe two variants)
(Add AB-134 info)
 
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Nestopia Plus! has defined '''Submapper 13''' to denote a PCB variant with 512 KiB of each PRG ROM and CHR ROM that can switch between regular CHR ROM and 8 KiB unbanked CHR RAM. CHR RAM is selected when PRG A17 and PRG A18 are both =1.
Nestopia Plus! has defined '''Submapper 13''' to denote a PCB variant with 512 KiB of each PRG ROM and CHR ROM that can switch between regular CHR ROM and 8 KiB unbanked CHR RAM. CHR RAM is selected when PRG A17 and PRG A18 are both =1.


Nestopia Plus! further uses Submapper 13 to denote the ''(AB-128) Well 8-in-1'' multicart with 1 MiB of each PRG ROM and CHR ROM, which is incompatible to the above definition, and which is hereby reassigned to '''Submapper 14'''. Its Outer Bank Register has the following form:
Nestopia Plus! further uses Submapper 13 to denote the ''(AB-128) Well 8-in-1'' multicart with 1 MiB of each PRG ROM and CHR ROM, which is incompatible to the above definition, and which is hereby reassigned to '''Submapper 14'''. Its actual PCB name is '''AB892''', and its Outer Bank Register has the following form:


  D~[LTRc SBBp]
  D~[LTRc SBBp]
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     |+--------- CHR A17 mode: 0=from MMC3, 1=from c
     |+--------- CHR A17 mode: 0=from MMC3, 1=from c
     +---------- 1=Lock Outer Bank register until next reset
     +---------- 1=Lock Outer Bank register until next reset
At least one cart (AB-134) re-uses this PCB but leaves the CHR RAM spot unpopulated, still using the combined bit for PRG/CHR A18, but rendering the "R" bit 5 meaningless. The correct NES 2.0 header for this would be submapper 14 but with zero CHR RAM.


== See also ==
== See also ==
* [http://nesdev.org/Mari7in1.txt "Mario Party" 7 in 1] by The Mad Dumper.
* [http://nesdev.org/Mari7in1.txt "Mario Party" 7 in 1] by The Mad Dumper.
* [http://forums.nesdev.org/viewtopic.php?f=9&t=10703 Forum thread] about mapper 052 by FARID
* [http://forums.nesdev.org/viewtopic.php?f=9&t=10703 Forum thread] about mapper 052 by FARID

Latest revision as of 18:15, 30 November 2023

iNES Mapper 052 denotes the Realtec 8213 and similar MMC3-based multicart circuit boards.

Outer Bank Register ($6000-$7FFF, write)

D~[LTCc SBPp]
   |||| ||++-- PRG A18..A17
   |||| |+---- PRG/CHR A19
   |||| +----- PRG A17 mode: 0=from MMC3, 1=from p
   ||++------- CHR A18..A17
   |+--------- CHR A17 mode: 0=from MMC3, 1=from c
   +---------- 1=Lock Outer Bank register until next reset
Value on reset: $00

The MMC3's WRAM interface must be enabled and writeable in MMC3 register $A001. The Outer Bank Register overlaps any actual PRG RAM that may be present.

Mixed CHR ROM/CHR RAM variants

Nestopia Plus! has defined Submapper 13 to denote a PCB variant with 512 KiB of each PRG ROM and CHR ROM that can switch between regular CHR ROM and 8 KiB unbanked CHR RAM. CHR RAM is selected when PRG A17 and PRG A18 are both =1.

Nestopia Plus! further uses Submapper 13 to denote the (AB-128) Well 8-in-1 multicart with 1 MiB of each PRG ROM and CHR ROM, which is incompatible to the above definition, and which is hereby reassigned to Submapper 14. Its actual PCB name is AB892, and its Outer Bank Register has the following form:

D~[LTRc SBBp]
   |||| |||+-- PRG A18..A17
   |||| |++--- PRG/CHR A19..A18
   |||| +----- PRG A17 mode: 0=from MMC3, 1=from p
   |||+------- CHR A17
   ||+-------- 0=CHR-ROM, 1=CHR RAM
   |+--------- CHR A17 mode: 0=from MMC3, 1=from c
   +---------- 1=Lock Outer Bank register until next reset

At least one cart (AB-134) re-uses this PCB but leaves the CHR RAM spot unpopulated, still using the combined bit for PRG/CHR A18, but rendering the "R" bit 5 meaningless. The correct NES 2.0 header for this would be submapper 14 but with zero CHR RAM.

See also