INES Mapper 132: Difference between revisions

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==TXC 01-22270-000 PCB with 74LS161 latch==
==TXC 01-22270-000 PCB with 74LS161 latch==
Instead of the 05-00002-010 ASIC, the 01-22270-000 PCB variant can also use a simple 74LS161 latch, which would make the board function as follows:
Instead of the 05-00002-010 ASIC, the 01-22270-000 PCB variant can also use a simple 74LS161 latch, which would make the board function as [[MHROM]].
Mask: $8000 (bus conflicts)
  7654 3210
  ---------
  .... .PCC
      .|++- Select 8 KiB CHR-ROM bank at PPU $0000-$1FFF (CHR A13/A14)
        +-- Select 32 KiB PRG-ROM bank at CPU $8000-$FFFF (PRG A15)
 
No ROM image is known to exist that uses this board configuration.


==Notes==
==Notes==

Revision as of 21:46, 1 March 2018

INES Mapper 132 is used to denote three compatible boards used by games from TXC Corporation:

  • TXC 01-22003-400 PCB: 72 pins with CIC stun circuit, TXC 05-00002-010 ASIC, max. 64 KiB PRG-ROM, max. 32 KiB CHR-ROM
  • TXC 01-22111-100 PCB: 60 pins, TXC 05-00002-010 ASIC, max. 64 KiB PRG-ROM, max. 32 KiB CHR-ROM
  • TXC 01-22270-000 PCB: 60 pins, TXC 05-00002-010 ASIC or 74LS161 latch, max. 64 KiB PRG-ROM, max. 32 KiB CHR-ROM
Title Cartridge code PRG-ROM CHR-ROM Notes
棋王 (Qíwáng, Chinese Chess) MGC-001 64 KiB 32 KiB
Creatom MGC-003 64 KiB 32 KiB
小瑪琍 (Xiǎo Mǎlí) MGC-005 16 KiB 8 KiB TXC re-release, no bankswitching or copy-protection. Cartridge label titles it Bingo.
麻将方块 (Mahjong Block) MGC-008 32 KiB 32 KiB TXC re-release
Venice Beach Volley MGC-010 32 KiB 32 KiB TXC re-release
Rad Racket - Deluxe Tennis II MGC-011 32 KiB 32 KiB TXC re-release

Its UNIF board name is UNL-22211.

Banks

  • CPU $8000-$FFFF: 32 KiB switchable PRG ROM bank
  • PPU $0000-$1FFF: 8 KiB switchable CHR ROM bank

Registers

Mapper 132 uses a custom IC (real number 05-00002-010, often with fake markings) serving as a latch, adder and inverter. There are five registers: Input (4 bits), Output (4 bits), Register (4 bits), Mode (1 bit) and Invert (1 bit).

Mask: $E103
Read $4100-$4103: [.... RRRR]: Read Register. Bit 3 is inverted if Invert==1. Bits 4-7 are open bus.
Write $4100: When Mode==0: Bits 0-3 of Register := Input, bits 0-2 being inverted if Invert==1.
             When Mode==1: Bits 0-2 of Register incremented by one, bit 3 unaffected.
Write $4101: Invert := Written value bit 0.
Write $4102: Input := Written value bits 0-3.
Write $4103: Mode := Written value bit 0.
Write $8000-$FFFF: Output := Register; written value is ignored.

In Mapper 132, Output is connected as follows:

 3210
 ----
 .|++- Select 8 KiB CHR-ROM bank at PPU $0000-$1FFF (CHR A13/A14)
  +-- Select 32 KiB PRG-ROM bank at CPU $8000-$FFFF (PRG A15)

Games will also check the lower three or four bits of $4100 for the correct value after several increment and inversion operations as a copy-protection measure.

TXC 01-22270-000 PCB with 74LS161 latch

Instead of the 05-00002-010 ASIC, the 01-22270-000 PCB variant can also use a simple 74LS161 latch, which would make the board function as MHROM.

Notes

  • 戰國四川省 (Zhànguó Sìchuān Shěng, original version of AVE's Tiles of Fate) is set to Mapper 132 in GoodNES 3.23b. That ROM image is actually a mapper hack with the PRG-ROM code unmodified but the CHR-ROM banks rearranged to work as Mapper 132; the correct mapper is INES Mapper 173. That mapper hack only works on certain emulators' implementation of Mapper 132, not on the above implementation based on studying the circuit board.
  • The TXC re-release of 小瑪琍 (Xiǎo Mǎlí), with cartridge code MGC-005, uses the 01-22111-100 board as well, but since it does not use any bankswitching whatsoever, it can be emulated as mapper 0.
  • 麻将方块 (Mahjong Block) (TXC re-release, headerless CRC32 0ACFC3CD) is commonly set to INES Mapper 173, but since it expects Output bit 1 to select CHR A14, it actually uses INES Mapper 132. Note that the original Super Mega release of the game uses INES Mapper 172.

Similar Mappers

  • On games with only 32 KiB PRG-ROM, Mapper 132 is almost identical to INES Mapper 136 except in the value read from $4100 due to Mapper 136 having four (28-pin JV001 ASIC) versus Mapper 132 having three adder bits (24-pin 05-00002-010 ASIC).
  • On games with only 32 KiB PRG-ROM, INES Mapper 173 is similar to Mapper 132 except that CHR A14 is taken from the inverse of the Invert bit rather than Output bit 1.
  • INES Mapper 036 is somewhat similar, using the same 05-00002-010 ASIC. It utilizes CPU bits 4 and 5 instead of 2 for PRG-ROM banking and moves CHR-ROM banking to a separate data latch.

See also

PCB images