INES Mapper 144: Difference between revisions

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m (rephrase to less awkward and hopefully more clear)
(omit link to redirect (since we already link to its target)... also link to NesCartDB for the cart and for the comparison board)
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[[Category:GNROM-like mappers|144]][[Category:iNES Mappers|144]][[Category:in NesCartDB|144]]
[[Category:GNROM-like mappers|144]][[Category:iNES Mappers|144]][[Category:in NesCartDB|144]]
[[iNES Mapper 144]], allocated for the game ''Death Race'', describes a intentionally defective variant of the [[Color Dreams]] board ([[iNES Mapper 011|11]]).
[[iNES Mapper 144]], allocated for the game [http://bootgod.dyndns.org:7777/profile.php?id=1223 Death Race], describes a intentionally defective variant of the [[Color Dreams]] board ('''mapper 11''').


This game's PCB (labelled '''50282''') is almost identical to the revision B Color Dreams boards, but a 300Ω resistor was added between CPU D0 and the combination of mapper hardware and ROM. This addition means that ''only'' the ROM's ''least significant bit'' always wins bus conflicts.
This game's PCB (labelled '''50282''') is almost identical to the [http://bootgod.dyndns.org:7777/search.php?pcb=UNK-COLORDREAMS-REVB revision B Color Dreams boards], but a 300Ω resistor was added between CPU D0 and the combination of mapper hardware and ROM. This addition means that ''only'' the ROM's ''least significant bit'' always wins bus conflicts.


Nestopia-1.4.0 implements this as <code>EffectiveData = (WrittenData & ROM[address]) | (ROM[address] & 1)</code>
Nestopia-1.4.0 implements this as <code>EffectiveData = (WrittenData & ROM[address]) | (ROM[address] & 1)</code>

Revision as of 20:07, 24 April 2014

iNES Mapper 144, allocated for the game Death Race, describes a intentionally defective variant of the Color Dreams board (mapper 11).

This game's PCB (labelled 50282) is almost identical to the revision B Color Dreams boards, but a 300Ω resistor was added between CPU D0 and the combination of mapper hardware and ROM. This addition means that only the ROM's least significant bit always wins bus conflicts.

Nestopia-1.4.0 implements this as EffectiveData = (WrittenData & ROM[address]) | (ROM[address] & 1)

FCEUX-2.1.5 works around this by ignoring writes to 0x8000

The most succinct description is EffectiveData = (ROM[address] & (WrittenData|1))