INES Mapper 163

iNES Mappers 162 and 163 denote two very similar circuit boards from 外星 (Wàixīng) and 南晶 (Nánjīng) that differ only in the way that the microwave interface is connected.

iNES Mapper 162 denotes the 外星 (Wàixīng) FS304 circuit board, used for the following games:

• Mummy - 神鬼传奇
• Zelda 传说: 三神之力 (ES-1096)
• 法老王 - Pharaoh
• 火焰纹章 - 圣战的系谱 and its title screen hack 聖火徽章 III (Shènghuǒ Huīzhāng III/Fire Emblem III)
• 西游记后传 (ES-1097)

A compatible circuit board with an unknown PCB code is used for a few games from 南晶 (Nánjīng):

• 梁山英雄 (Liángshān Yīngxióng, NJ023, title screen hack of 水浒神兽, NJ019)
• 农场小精灵 (Nóngchǎng Xiǎojīnglíng, NJ025, title screen hack of 牧场物语 - Harvest Moon, NJ011)

iNES Mapper 163 denotes the 南晶 (Nánjīng) FC-001 circuit board, used on most of their games, including:

• 牧场物语 - Harvest Moon (NJ011)
• 水浒神兽 (Shuǐhǔ Shénshòu, NJ019)
• 暗黑破坏神 - Diablo (NJ037)
• 轩辕剑外传 之 天之痕 (Xuānyuánjiàn Wàizhuàn zhī Tiānzhīhén, NJ045)
• Final Fantasy IV - 最终幻想 4꞉ 光与暗 水晶纷争 (NJ098)

Banks

• CPU $6000-$7FFF: 8 KiB unbanked PRG-RAM, battery-backed
• CPU $8000-$FFFF: 32 KiB switchable PRG-ROM bank
• PPU $0000-$1FFF: 8 KiB unbanked CHR-RAM bank, 4 KiB can be automatically switched
• Nametable mirroring: hard-wired

Registers

All registers are initialized to $00 on reset.

PRG-ROM Bank Low/CHR-RAM Switch ($5000, write)

Mask: $FF00

D~7654 3210
  ---------
  C... PPPP
  |    ++++- PRG A18..A15
  +--------- Automatic 4 KiB CHR-RAM switch: when PPU A13=0 ...
              0: PPU A12=CPU A12 (disable auto-switch)
              1: PPU A12=CPU A9, latched during last rise of
                 PPU A13 during R/W (enable auto-switch)

• Automatic 4 KiB CHR-RAM switch means that the left pattern table is used for the the top half of any nametable, and the right pattern table for the bottom half of any nametable, regardless of the scroll position.
• Note that if $5300.0 is 1, the two lowest bits are swapped during writing.
• Changing the value of $5300.0 without writing to $5000 afterwards does not change the latched bits.
• On iNES Mapper 162, the actual PRG A15 is the bit coming from this register is OR'd with ASIC pin #4 set by register $5100.

Microwire Interface ($5100, write)

Mask: $FF00

D~7654 3210
  ---------
  .... .ABC
        ||+- ASIC pin #1 output if $5100.0=0, ASIC pin #4 output if $5100.0=1
        |+-- ASIC pin #4 output if $5100.0=0, ASIC pin #1 output if $5100.0=1
        +--- ASIC pin #31, see below

The microwire interface is normally connected to serial EEPROM on other mappers using a similar chipset. On iNES Mapper 162:

• PRG A15 is the OR of $5000 and the latched output of ASIC pin #4 set by this register;
• ASIC pin #31's output is latched as written.

On iNES Mapper 163:

• if A0=0 during writing to $51xx, the inverted output of ASIC pin #31 is latched from bit 2,
• if A0=1 during writing to $51xx, the previously-latched output of ASIC pin #31 is inverted if ASIC pin #1 changes from 1 to 0, and bit 2 is ignored.

Note that if $5300.0 is 1, there are two effects on this register:

• the two lowest bits are swapped during writing before being latched;
• the two latched bits are swapped before being output as long as $5300.0 remains 1.

These two effects counteract each other, so that register $5100 effectively operates identically regardless of the $5300.0 value. When writing to $5300 and changing its bit 0 without writing to $5100 afterwards, ...

• the latched values of B and C remain as when they were written, but
• the choice of which latched bit to be output to pin #1 and #4 changes;

or in other words, pins #1 and #4 swap their values until $5100 is written to again. This behavior is relevant for the two mapper 162 Nánjīng games.

PRG-ROM Bank High ($5200, write)

Mask: $FF00

D~7654 3210
  ---------
  .... ..PP
         ++- PRG A20..A19

• Note that if $5300.0 is 1, the two lowest bits are swapped during writing.
• Games with 1 MiB PRG-ROM that set $5300.0=1 still use bit 0 to denote PRG A19; they must connect both ASIC PRG A19 and A20 outputs to the ROM chip's A19 pin.

Mode ($5300, write)

Mask: $FF00

D~7654 3210
  ---------
  .... .A?B
        | +- 0: Leave D0,D1 unmodified on register writes to $5000-$5200.
        |    1: Swap D0,D1 on all register writes to $5000-$5200.
        +--- 0: PRG A15/A16=1
             1: PRG A15/A16 from $5000

• Writes to this register are not subject to D0/D1 bit-swapping, i.e. the register is not affected by its own bit 0.
• Because this register is initialized to $00 on reset, thus clearing bit 2 which causes PRG A15/A16 to be held high, the game will boot in 32 KiB PRG-ROM bank #3.

Microwire Interface ($5100/$5500, read)

Mask: $FF00

D~7654 3210
  ---------
  .... .A..
        |
        |
        +--- ASIC pin #31 input

Bit 2 reads back the current state of pin #31.

Notes

• Setting $5300.0=1 will effectively swap PRG A15/A16 and PRG A19/A20. Cartridges using this mapper must be dumped with $5300=$04 during dumping, even if the games run with $5300=$07. Otherwise, PRG A15/A16 and PRG A19/A20 would be swapped both during dumping and emulation, negating the effect; such images will therefore not work with an accurate emulation of this mapper.
• 暗黑破坏神 - Diablo (NJ037) and its title screen hack 毁灭之神 (NJ078) mistakenly disable automatic 4 KiB CHR-RAM switching mid-screen during the ending cutscene, causing flickering on real hardware.
• 魔兽世界: 恶魔猎人 (NJ097) puts the 8x16 sprites into the wrong pattern table for automatic 4 KiB CHR-RAM switching, causing a glitched cursor on the title screen on real hardware.

See also

• INES Mapper 164 is an earlier implementation without D0/D1 swapping, swaps the meaning of registers $5100 and $5200, has optional UxROM-like bankswitching, and a 1 bpp CHR mode.
• NES 2.0 Mapper 558 swaps the meaning of registers $5100 and $5200, and connects the microwire interface to EEPROM.