MMC3 pinout: Difference between revisions

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Nintendo MMC3: 44-pin QFP
Nintendo [[MMC3]]: 44-pin QFP


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Revision as of 06:48, 22 August 2012

Nintendo MMC3: 44-pin QFP

                       / \
                      / O \
                ? -> /01 44\ -> CHR A16
         CHR A10 <- /02   43\ -> CHR A11
        PPU A12 -> /03     42\ -> PRG RAM /WE
       PPU A11 -> /04       41\ -> PRG RAM +CE
      PPU A10 -> /05         40\ -  GND
         GND  - /06         \ 39\ <- CPU D3
    CHR A13 <- /07           \ 38\ <- CPU D2
   CHR A14 <- /08         \  _\ 37\ <- CPU D4
  CHR A12 <- /09         \ \|    36\ <- CPU D1
VRAM A10 <- /10           \ \     35\ <- CPU D5
CHR A15 <- /11         \  _\    o  34\ <- CPU D0
CHR A17 <- \12       /\ \|         33/ <- CPU D6
    /IRQ <- \13        \ \        32/ <- CPU A0
  /ROMSEL -> \14   /    \        31/ <- CPU D7
       GND  - \15  |_   /       30/ -> PRG RAM /CE
          ? -> \16   |         29/ <- M2
     CPU R/W -> \17  |/       28/ -  GND
      PRG A15 <- \18         27/ -  VCC
       PRG A13 <- \19       26/ -> PRG /CE
        CPU A14 -> \20     25/ -> PRG A17
         PRG A16 <- \21   24/ <- CPU A13
          PRG A14 <- \22 23/ -> PRG A18
                      \ O /	 
                       \ /	 	 

01 sometimes shorted to pin 2, otherwise floating
16 sometimes grounded, otherwise floating

Note the orientation of the text: "MMC3" when viewed upright specifies pin 1 is bottom face, leftmost.