NES 2.0 Mapper 274: Difference between revisions

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                 1: Horizontal
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==Inner Upper Bank, Chip Select for Lower Bank and Common Outer Bank==
==Inner Upper Bank, Chip Select for Lower Bank, and Common Outer Bank==
  $A000-$BFFF: Select chip #0 for lower bank
  $A000-$BFFF: Select chip #0 for lower bank
  $C000-$FFFF: Select chip #1 for lower bank
  $C000-$FFFF: Select chip #1 for lower bank

Revision as of 08:15, 17 February 2018

NES 2.0 Mapper 274 is used for the 90-in-1 Hwang Shinwei multicart. Its UNIF board name is BMC-80013-B.

Banks

  • CPU $8000-$BFFF: Lower switchable 16 KiB PRG-ROM bank.
  • CPU $C000-$FFFF: Upper switchable 16 KiB PRG-ROM bank.
  • PPU $0000-$1FFF: 8 KiB of CHR-RAM.

There are two PRG-ROM chips. Either chip can be mapped into the lower PRG-ROM bank, determined by whether the outer bank number is written to the $A000-$BFFF range (chip #0) or $C000-$FFFF range (chip #1). The upper PRG-ROM bank always uses chip #0.

Registers

Inner Lower Bank and Mirroring ($8000-$9FFF)

Bit 7654 3210
    ---------
    ...M BBBB
       | ++++- Select 16 KiB inner PRG-ROM bank at CPU $8000-$BFFF
       +------ Select nametable mirroring
               0: Vertical
               1: Horizontal

Inner Upper Bank, Chip Select for Lower Bank, and Common Outer Bank

$A000-$BFFF: Select chip #0 for lower bank
$C000-$FFFF: Select chip #1 for lower bank
Bit 7654 3210
    ---------
    .OOO IIII
     ||| ++++- Select 16 KiB inner PRG-ROM bank at CPU $C000-$FFFF
     +++------ Select 256 KiB outer PRG-ROM bank at CPU $8000-$FFFF

Notes

  • If the ROM image is truncated to only contain the first chip's data, the 90-in-1 multicart becomes a 72-in-1 multicart.