NES 2.0 Mapper 471

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Revision as of 12:51, 22 January 2023 by NewRisingSun (talk | contribs) (Created page with "{{DEFAULTSORT:471}} '''NES 2.0 Mapper 471''' denotes the '''Impact Soft IM1''' circuit board, used for ''Haratyler'' (without ''HG'' or ''MP'') and ''Haraforce''. It is basically INES Mapper 201 with the addition of a scanline IRQ. =Banks= * CPU $8000-$FFFF: 32 KiB switchable PRG ROM bank * PPU $0000-$1FFF: 8 KiB switchable CHR ROM bank * Nametable mirroring: hard-wired, selectable via solder pad =Address Latch/Acknowledge IRQ ($8000-$FFFF, write)= Mask: $8000...")
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NES 2.0 Mapper 471 denotes the Impact Soft IM1 circuit board, used for Haratyler (without HG or MP) and Haraforce. It is basically INES Mapper 201 with the addition of a scanline IRQ.

Banks

  • CPU $8000-$FFFF: 32 KiB switchable PRG ROM bank
  • PPU $0000-$1FFF: 8 KiB switchable CHR ROM bank
  • Nametable mirroring: hard-wired, selectable via solder pad

Address Latch/Acknowledge IRQ ($8000-$FFFF, write)

Mask: $8000

A~[1... .... .... ...B]
                     +- Select PRG A15 and CHR A13

Writing to this latch acknowledges a pending IRQ.

Scanline IRQ

On every falling edge of PPU A12, an IRQ is raised that must be acknowledged by writing to the address latch. No filtering is performed; it is assumed that the interrupt handler will take long enough to execute so that it gets to be executed only once per scanline.