NES 2.0 submappers/Proposals

This page collects proposals for NES 2.0 submappers that are not yet ready for implementation.

004: MMC3

Status: Draft

iNES Mapper 004 represents the most common boards using these four ICs: early MMC3, late MMC3, MC-ACC, and MMC6.

There are three known kinds of IRQ:

MMC3A

/IRQ is asserted on A12 rise, and loading the latch with 0 disables IRQ. Some chips labeled MMC3B also have this "old style" behavior. No games are known to rely on this behavior.

MMC3C

/IRQ is asserted on A12 rise, and loading the latch with 0 produces an IRQ on every scanline. Some chips labeled MMC3B also have this "new style" behavior, as does the MMC6. Some later games rely on this behavior.

MC-ACC

/IRQ is asserted on A12 fall, typically four pixels later than MMC3C. Interrupts can be produced every scanline, like the MMC3C. The MC-ACC is found on second-source PCBs manufactured by Acclaim found in 13 games from Alien 3 to WWF King of the Ring.

There are two known kinds of PRG RAM enable:

MMC3

One set of enable bits controls the entire chip.

MMC6

The first and second enables control the first and second half of PRG RAM, and an additional enable in bit 5 of $8000 controls the whole PRG RAM. Used in StarTropics and StarTropics 2.

The TEROM and TFROM boards have two jumpers that can respectively disable IRQs and force hard-wired mirroring. It is believed that nothing was ever released that used them.

Kev allocated 0-2 as follows:

• 0: MMC3C
• 1: MMC6 (different PRG RAM enable)
• 2: MMC3C with hard-wired mirroring
• 3: MC-ACC

Source: MMC3 submappers; MC-ACC IRQ test results; rainwarrior makes a case for MMC6 getting its own code

005: MMC5

Status: Wishlist

Vertical split mode:
0: SL (all known hardware)
1: CL

If only one kind (battery or non-battery) of PRG-RAM present:
0: PRG-RAM is contiguous (EKROM, EWROM)
2: PRG-RAM is not contiguous; is split in half across two chips

If both kinds of PRG-RAM present:
0: Chip 0 is battery-backed (ETROM (note: verify this))
2: Chip 1 is battery-backed

Pulse waves volume:
0: R1 is 6.8kΩ (as in all games that use expansion audio)
4: R1 is 15kΩ (the nominal value of this resistor)

It is safe to leave the submapper number at 0 for all known games.

002, 003, 007: UxROM, CNROM, AxROM

Status: Draft

AxROM (mapper 7) is the only known licensed discrete logic mapper to unreliably come with bus conflict prevention circuitry. While no game documented in NesCartDB was released in one region on multiple board variants, several games did change boards when localized.

The following table is tentatively offered-
0: Normal (No advisory statement is made as to whether this game has bus conflicts) (uninvestigated AOROM)
1: Bus conflicts do not occur (ANROM)
2: Bus conflicts occur (AMROM)

Although all Nintendo-manufactured games using normal CNROM (mapper 3), normal UxROM (mapper 2), and inverted UxROM (mapper 180) had bus conflicts, apparently several unlicensed games require their absence, as does the updated version of Donkey Kong with the pie factory level.[1] This same table should be used for them, too.

CNROM with security diodes (mapper 185) has a different set of submapper definitions.

019: Namco 129 and 163

Status: Problem outline

Mapper 19 designates the Namco 129 and 163, which supports expansion sound, IRQs, and ROM nametables.

Different 163-using PCBs used a different resistor to change the volume of the expansion audio relative to the internal 2A03 audio. It is unclear if this variation warrants a submapper.

KH allocated a submapper specifically for the N163-using game Mindseeker. It is not known what is different about this game.

Source: KH's submappers

021, 023, 025: VRC4

Konami's VRC4 mapper has five known variations of how the board connects low CPU address lines among A7-A0 to the port select lines of the mapper. These are spread across three mappers: two for 21, two for 25, and one for 23. There are theoretically 8*7 = 56 ways to wire these, but in all five extant possibilities, two adjacent address lines are used: A2 and A1, A0 and A1, A7 and A6, A2 and A3, and A3 and A2. All 14 combinations of two adjacent address lines easily fit in a submapper number:

3210
||||
|+++- Which address line corresponds is wired to the A1 in the VRC4a
+---- 0: Use next lower address line for VRC4a A2; 1: use next higher line

The values 0 (A0 and next lower) and 15 (A7 and next higher) are impossible.

The VRC4 article describes the ports by mapping them to the variant called "VRC4a" on that page, which uses A2 and A1, putting the four VRC IRQ ports (IRQ Latch low, IRQ Latch high, IRQ Control, and IRQ Acknowledge) at $F000, $F002, $F004, and $F006.

Nickname	A2	A1	Registers	iNES mapper	NES 2.0 submapper
VRC4a	A2	A1	$x000, $x002, $x004, $x006	21	9
VRC4b	A0	A1	$x000, $x002, $x001, $x003	25	1
VRC4c	A7	A6	$x000, $x040, $x080, $x0C0	21	14
VRC4d	A2	A3	$x000, $x008, $x004, $x00C	25	3
VRC4e	A3	A2	$x000, $x004, $x008, $x00C	23	10

023, 025: VRC2

Mappers 23 and 25 are used for both Konami's VRC2 and VRC4. It is tentatively suggested that submapper 15 (invalid per the VRC4 definitions) be used to mark VRC2-using games, to handle the bit at $6000 and lack of interrupts. Neither divides CHR bank select by two, unlike #22.

• 23.15 is VRC2 ($xxx0, $xxx1, $xxx2, $xxx3)
• 25.15 is VRC2 ($xxx0, $xxx2, $xxx1, $xxx3)