Namcot 163 family pinout: Difference between revisions

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m (Add differences for n175 and n340.)
m (switch to using CPU/PRG and PPU/CHR for extra clarity, also had a typo on the arrow for pin 23)
Line 11: Line 11:
                 GND  -  /06          43\ -- +5v
                 GND  -  /06          43\ -- +5v
       (r) PRG A18 <-  /07            42\ -> CIRAM /CE (n)
       (r) PRG A18 <-  /07            42\ -> CIRAM /CE (n)
       (r) PRG A17 <-  /08              41\ -> CHRROM /CE (r)
       (r) PRG A17 <-  /08              41\ -> CHR /CE (r)
     (r) PRG A16 <-  /09                40\ -> *WRAM /CE (w)
     (r) PRG A16 <-  /09                40\ -> *WRAM /CE (w)
     (r) PRG A15 <-  /10                  39\ -> /IRQ (n)
     (r) PRG A15 <-  /10                  39\ -> /IRQ (n)
   (r) PRG A14 <-  /11                    38\ <- CHR A10 (n)
   (r) PRG A14 <-  /11                    38\ <- PPU A10 (n)
   (r) PRG A13 <-  /12                      37\ <- CHR A11 (n)
   (r) PRG A13 <-  /12                      37\ <- PPU A11 (n)
   (s)  PRG D7 <-> \13                      36/ <- CHR A12 (n)
   (s)  CPU D7 <-> \13                      36/ <- PPU A12 (n)
   (s)  PRG D6 <-> \14                    35/ <- CHR A13 (n)
   (s)  CPU D6 <-> \14                    35/ <- PPU A13 (n)
     (s)  PRG D5 <-> \15                  34/ -- GND?
     (s)  CPU D5 <-> \15                  34/ -- GND?
     (s)  PRG D4 <-> \16                33/ <- CHR nRD (n)
     (s)  CPU D4 <-> \16                33/ <- PPU nRD (n)
       (s)  PRG D3 <-> \17              32/ -- +5V
       (s)  CPU D3 <-> \17              32/ -- +5V
       (s)  PRG D2 <-> \18            31/ -- GND
       (s)  CPU D2 <-> \18            31/ -- GND
                 +5v  -  \19          30/ <- M2 (n)
                 +5v  -  \19          30/ <- M2 (n)
         (s)  PRG D1 <-> \20        29/ <- PRG R/W (n,w)
         (s)  CPU D1 <-> \20        29/ <- CPU R/W (n,w)
           (s)  PRG D0 <-> \21      28/ <- PRG /CE (n)
           (s)  CPU D0 <-> \21      28/ <- /ROMSEL (n)
                   GND?  -  \22    27/ <- PRG A14 (n)
                   GND?  -  \22    27/ <- CPU A14 (n)
             (r) PRG /CE  -> \23  26/ <- PRG A13 (n)
             (r) PRG /CE  <- \23  26/ <- CPU A13 (n)
             (s) PRG A11  -> \24 25/ <- PRG A12 (s)
             (s) CPU A11  -> \24 25/ <- CPU A12 (s)
                               \  /
                               \  /
                               \_/
                               \_/
Line 41: Line 41:
Namcot 175: 48-pin QFP
Namcot 175: 48-pin QFP
   42\ -> '''?'''
   42\ -> '''?'''
   41\ -> CHRROM /CE (r)
   41\ -> CHR /CE (r)
     40\ -> '''?'''
     40\ -> '''?'''
     39\ -> '''?'''
     39\ -> '''?'''
Line 50: Line 50:
   42\ -> '''?'''
   42\ -> '''?'''
   41\ -> '''?'''
   41\ -> '''?'''
     40\ -> '''CHRROM /CE (r)'''
     40\ -> '''CHR /CE (r)'''
     39\ -> '''CIRAM A10 (n)'''
     39\ -> '''CIRAM A10 (n)'''
  01 sound was also removed.
  01 sound was also removed.

Revision as of 23:41, 23 July 2012

The Namcot 129 and 163 seem to be identical. The Namcot 175 and 340 have minor but vital differences.

Namcot 129 and 163: 48-pin QFP 

                             /   \
            (n) SOUND   <-  /01 48\ -> CHR A14 (r)
           (r) CHR A13 <-  /02   47\ -> CHR A15 (r)
          (r) CHR A12 <-  /03     46\ -> CHR A16 (r)
         (r) CHR A11 <-  /04       45\ -> CHR A17 (r)
        (s)*CHR A10 <-  /05         44\ -> ?
               GND  -  /06           43\ -- +5v
      (r) PRG A18 <-  /07             42\ -> CIRAM /CE (n)
     (r) PRG A17 <-  /08               41\ -> CHR /CE (r)
    (r) PRG A16 <-  /09                 40\ -> *WRAM /CE (w)
   (r) PRG A15 <-  /10                   39\ -> /IRQ (n)
  (r) PRG A14 <-  /11                     38\ <- PPU A10 (n)
 (r) PRG A13 <-  /12                       37\ <- PPU A11 (n)
 (s)  CPU D7 <-> \13                       36/ <- PPU A12 (n)
  (s)  CPU D6 <-> \14                     35/ <- PPU A13 (n)
   (s)  CPU D5 <-> \15                   34/ -- GND?
    (s)  CPU D4 <-> \16                 33/ <- PPU nRD (n)
     (s)  CPU D3 <-> \17               32/ -- +5V
      (s)  CPU D2 <-> \18             31/ -- GND
               +5v  -  \19           30/ <- M2 (n)
        (s)  CPU D1 <-> \20         29/ <- CPU R/W (n,w)
         (s)  CPU D0 <-> \21       28/ <- /ROMSEL (n)
                 GND?  -  \22     27/ <- CPU A14 (n)
           (r) PRG /CE  <- \23   26/ <- CPU A13 (n)
            (s) CPU A11  -> \24 25/ <- CPU A12 (s)
                             \   /
                              \_/
05 also connects to CIRAM A10
19 Some boards connect a battery (through a standard diode switch) to this pin to make the waveform memory nonvolatile
22 Some boards this is connected to +5V, some to Gnd, so probably an input
32 Some boards connect a battery to this pin instead
33 Ground this pin with if CHR's nOE and nCS lines are separate
34 Probably an input instead of a power supply, can't find an example of it being used
40 6264 /CE connected to this pin
44 Might be an enable for CHR RAM, can't find an example of it being used

Namcot 175: 48-pin QFP 

 42\ -> ?
  41\ -> CHR /CE (r)
   40\ -> ?
    39\ -> ?
01 sound was also removed
05 does NOT connect to CIRAM A10

Namcot 340: 48-pin QFP 

 42\ -> ?
  41\ -> ?
   40\ -> CHR /CE (r)
    39\ -> CIRAM A10 (n)
01 sound was also removed.
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