Namcot 163 family pinout: Difference between revisions

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m (switch to using CPU/PRG and PPU/CHR for extra clarity, also had a typo on the arrow for pin 23)
m (link back)
Line 2: Line 2:
The Namcot 175 and 340 have minor but vital differences.
The Namcot 175 and 340 have minor but vital differences.


Namcot 129 and 163: 48-pin QFP
[[Namco 106|Namcot 129 and 163]]: 48-pin QFP (canonically [[iNES Mapper 019]])
                               /  \
                               /  \
             (n) SOUND  <-  /01 48\ -> CHR A14 (r)
             (n) SOUND  <-  /01 48\ -> CHR A14 (r)
Line 39: Line 39:
  44 Might be an enable for CHR RAM, can't find an example of it being used
  44 Might be an enable for CHR RAM, can't find an example of it being used


Namcot 175: 48-pin QFP
Namcot 175: 48-pin QFP (canonically [[iNES Mapper 210]])
   42\ -> '''?'''
   42\ -> '''?'''
   41\ -> CHR /CE (r)
   41\ -> CHR /CE (r)
Line 47: Line 47:
  05 does NOT connect to CIRAM A10
  05 does NOT connect to CIRAM A10


Namcot 340: 48-pin QFP
Namcot 340: 48-pin QFP (not allocated a mapper)
   42\ -> '''?'''
   42\ -> '''?'''
   41\ -> '''?'''
   41\ -> '''?'''

Revision as of 00:12, 27 January 2013

The Namcot 129 and 163 seem to be identical. The Namcot 175 and 340 have minor but vital differences.

Namcot 129 and 163: 48-pin QFP (canonically iNES Mapper 019)

                             /   \
            (n) SOUND   <-  /01 48\ -> CHR A14 (r)
           (r) CHR A13 <-  /02   47\ -> CHR A15 (r)
          (r) CHR A12 <-  /03     46\ -> CHR A16 (r)
         (r) CHR A11 <-  /04       45\ -> CHR A17 (r)
        (s)*CHR A10 <-  /05         44\ -> ?
               GND  -  /06           43\ -- +5v
      (r) PRG A18 <-  /07             42\ -> CIRAM /CE (n)
     (r) PRG A17 <-  /08               41\ -> CHR /CE (r)
    (r) PRG A16 <-  /09                 40\ -> *WRAM /CE (w)
   (r) PRG A15 <-  /10                   39\ -> /IRQ (n)
  (r) PRG A14 <-  /11                     38\ <- PPU A10 (n)
 (r) PRG A13 <-  /12                       37\ <- PPU A11 (n)
 (s)  CPU D7 <-> \13                       36/ <- PPU A12 (n)
  (s)  CPU D6 <-> \14                     35/ <- PPU A13 (n)
   (s)  CPU D5 <-> \15                   34/ -- GND?
    (s)  CPU D4 <-> \16                 33/ <- PPU nRD (n)
     (s)  CPU D3 <-> \17               32/ -- +5V
      (s)  CPU D2 <-> \18             31/ -- GND
               +5v  -  \19           30/ <- M2 (n)
        (s)  CPU D1 <-> \20         29/ <- CPU R/W (n,w)
         (s)  CPU D0 <-> \21       28/ <- /ROMSEL (n)
                 GND?  -  \22     27/ <- CPU A14 (n)
           (r) PRG /CE  <- \23   26/ <- CPU A13 (n)
            (s) CPU A11  -> \24 25/ <- CPU A12 (s)
                             \   /
                              \_/
05 also connects to CIRAM A10
19 Some boards connect a battery (through a standard diode switch) to this pin to make the waveform memory nonvolatile
22 Some boards this is connected to +5V, some to Gnd, so probably an input
32 Some boards connect a battery to this pin instead
33 Ground this pin with if CHR's nOE and nCS lines are separate
34 Probably an input instead of a power supply, can't find an example of it being used
40 6264 /CE connected to this pin
44 Might be an enable for CHR RAM, can't find an example of it being used

Namcot 175: 48-pin QFP (canonically iNES Mapper 210)

 42\ -> ?
  41\ -> CHR /CE (r)
   40\ -> ?
    39\ -> ?
01 sound was also removed
05 does NOT connect to CIRAM A10

Namcot 340: 48-pin QFP (not allocated a mapper)

 42\ -> ?
  41\ -> ?
   40\ -> CHR /CE (r)
    39\ -> CIRAM A10 (n)
01 sound was also removed.