User contributions for Quietust
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14 September 2022
- 19:3119:31, 14 September 2022 diff hist +70 m User:Quietust →What sort of stuff has he done? current
9 September 2022
- 12:3012:30, 9 September 2022 diff hist −1 m CPU Test Mode make this less confusing
4 September 2022
- 00:1900:19, 4 September 2022 diff hist +104 m PPU rendering →Line-by-line timing: mention PAL CPU/PPU divisor which is different from NTSC and Dendy
3 September 2022
- 03:1003:10, 3 September 2022 diff hist +29 m CPU Test Mode →2A07: it's hard to tell from the die images we have, but if pin 30 is normally grounded then the internal signal would have to be inverted
- 03:0503:05, 3 September 2022 diff hist +71 m CPU Test Mode →2A07
20 August 2022
- 18:1918:19, 20 August 2022 diff hist −26 m CPU unofficial opcodes fix visual6502 wiki link
11 August 2022
- 13:4113:41, 11 August 2022 diff hist +1 m Cartridge connector →Pinout of 60-pin Famicom consoles and cartridges
- 13:4013:40, 11 August 2022 diff hist +32 m Cartridge connector →Pinout of 60-pin Famicom consoles and cartridges: here too
10 August 2022
- 03:2503:25, 10 August 2022 diff hist +8 m VRC7 audio →Debug Mode: spacing
8 August 2022
- 19:4019:40, 8 August 2022 diff hist −150 Tools →Assemblers: asm6f is in the "commonly used assemblers" list, no need to have a duplicate link in "other assemblers"
30 July 2022
- 23:5023:50, 30 July 2022 diff hist 0 m VRC7 audio →Debug Mode
- 17:5617:56, 30 July 2022 diff hist +898 VRC7 audio →Debug Mode: Update to match Yuri213212's findings in Discord, and remove sortable flag because it doesn't really work anymore
28 July 2022
- 01:2701:27, 28 July 2022 diff hist +124 m VRC7 audio →Debug Mode
- 01:2401:24, 28 July 2022 diff hist 0 m VRC7 audio →Debug Mode: would want to hold PPU A13 high when writing registers, otherwise when M2 goes low it'll trigger "Set DAC"
- 01:2301:23, 28 July 2022 diff hist −542 VRC7 audio →Debug Mode: M2 was backwards, and some other details didn't line up with what I've traced in visualvrc7
- 00:2900:29, 28 July 2022 diff hist −75 VRC7 audio $E000.6 isn't a "silence" bit - it's a Reset signal
- 00:2500:25, 28 July 2022 diff hist 0 VRC7 audio →Debug Mode: "CPU A(n)" is pin 16, not pin 19
27 July 2022
- 16:0816:08, 27 July 2022 diff hist 0 m Delay code fix inconsistent indentation (group PHA+TYA and TAY+PLA together) current
22 July 2022
- 23:1123:11, 22 July 2022 diff hist +4 m Nesdev Wiki http -> https
18 July 2022
- 14:5414:54, 18 July 2022 diff hist +196 VRC6 A #053330 VRC6 (harvested from a Madara cartridge) has been decapped and revealed to be an SLA7340 CMOS gate array, very similar to the NEC MMC3B/MMC3C current
