User contributions for Ulfalizer

13:5713:57, 22 November 2015 diff hist −23‎ PPU registers ‎ Rewrite confusing sentence re. when the sprite 0 hit flag is cleared

12:1812:18, 14 June 2015 diff hist +257‎ Visual circuit tutorial ‎ Undo revision 11163 by Ulfalizer (talk)

11:2911:29, 9 June 2015 diff hist −257‎ m Visual circuit tutorial ‎ Nit.

03:5303:53, 18 May 2015 diff hist −3‎ m Visual circuit tutorial ‎ hints at -> shows
03:3603:36, 18 May 2015 diff hist +65‎ Visual circuit tutorial ‎ There's transistors on the power sources too though
03:3303:33, 18 May 2015 diff hist +299‎ Visual circuit tutorial ‎ Clarify that the metal + poly overlap in the NOR example does not form transistors

22:0722:07, 16 May 2015 diff hist −1‎ Visual circuit tutorial ‎ Grammar nit
21:4821:48, 16 May 2015 diff hist +11‎ Visual circuit tutorial ‎ Hint that a refresh might be similar to a real access
20:4920:49, 16 May 2015 diff hist +10‎ Visual circuit tutorial ‎ Have "latch" in the title of the latch section
19:3019:30, 16 May 2015 diff hist +2‎ m Visual circuit tutorial ‎ Nits
19:0019:00, 16 May 2015 diff hist −2‎ Visual circuit tutorial ‎ ...some more
18:5818:58, 16 May 2015 diff hist −2‎ Visual circuit tutorial ‎ De-parenthesize
18:5518:55, 16 May 2015 diff hist −21‎ Visual circuit tutorial ‎ "Which we would label" is redundant. '/' was already explained.
18:4718:47, 16 May 2015 diff hist +9‎ Visual circuit tutorial ‎ Small clocked latches clarification
18:4118:41, 16 May 2015 diff hist −112‎ Visual circuit tutorial ‎ The explanation for the NORiness of the latch is redundant given the image
18:3018:30, 16 May 2015 diff hist +1‎ Visual circuit tutorial ‎ Replace -- with en-dash
18:2918:29, 16 May 2015 diff hist −5‎ m Visual circuit tutorial ‎ De-will one more place
18:2418:24, 16 May 2015 diff hist 0‎ Visual circuit tutorial ‎ Nit
18:2218:22, 16 May 2015 diff hist +34‎ Visual circuit tutorial ‎ Was probably a good thing to explain why there might be a short
18:1618:16, 16 May 2015 diff hist −103‎ Visual circuit tutorial ‎ Simplify some more
18:0218:02, 16 May 2015 diff hist −30‎ m Visual circuit tutorial ‎ Language simplification nits
17:5017:50, 16 May 2015 diff hist −156‎ Visual circuit tutorial ‎ Remove potentially confusing note on S/R vs copied-into latches
17:4517:45, 16 May 2015 diff hist −1‎ Visual circuit tutorial ‎ Separate out power source + transistor example into its own section
17:4117:41, 16 May 2015 diff hist +11‎ Visual circuit tutorial ‎ Slight clean-up in power source + transistor examples
17:3317:33, 16 May 2015 diff hist +3‎ m Visual circuit tutorial ‎ s/unimportant/less important/
17:0717:07, 16 May 2015 diff hist −16‎ m Visual circuit tutorial ‎ Nits
16:5916:59, 16 May 2015 diff hist +2‎ m Visual circuit tutorial ‎ Use consistent hyphen style
16:5616:56, 16 May 2015 diff hist +4‎ Visual circuit tutorial ‎ Emphasize a 'not'
16:5516:55, 16 May 2015 diff hist +10‎ Visual circuit tutorial ‎ Clean up 'Wire capacitance as storage' section
16:4116:41, 16 May 2015 diff hist +33‎ Visual circuit tutorial ‎ Point out the power source in the NOR section
16:3816:38, 16 May 2015 diff hist +13‎ Visual circuit tutorial ‎ Simplify inverter example + nits

17:4417:44, 14 May 2015 diff hist +978‎ INES Mapper 028 ‎ Add visualization that might be helpful.
17:1517:15, 14 May 2015 diff hist +128‎ INES Mapper 028 ‎ Clarify how R:$01 works in 32K mode. The old version could be misunderstood as right-shifting it to get a 32K bank number.
07:4507:45, 14 May 2015 diff hist +8‎ INES Mapper 028 ‎ CHR bank is specified in R:$00 and "I" is confusing without explaining the mnemonic

14:3514:35, 13 May 2015 diff hist −1‎ MMC2 ‎ Mapper number should be 9 and not 10 in table. Prolly a copy-paste error from MMC4.
13:0413:04, 13 May 2015 diff hist +13‎ MMC2 ‎ "Left" and "right" are confusing if you haven't played much with pattern table viewers
13:0213:02, 13 May 2015 diff hist +6‎ MMC4 ‎ "Left" is confusing if you haven't played much with pattern table viewers

03:3303:33, 11 May 2015 diff hist −16‎ Tricky-to-emulate games ‎No edit summary
01:0401:04, 11 May 2015 diff hist −3‎ Tricky-to-emulate games ‎No edit summary
01:0301:03, 11 May 2015 diff hist −2‎ Tricky-to-emulate games ‎No edit summary
01:0201:02, 11 May 2015 diff hist +348‎ Tricky-to-emulate games ‎ Battletoads & Double Dragon dislikes WRAM

22:1522:15, 18 January 2015 diff hist −26‎ PPU power up state ‎ Simplify explanation a bit more.
22:1222:12, 18 January 2015 diff hist −27‎ PPU power up state ‎ Reformulate and reorganize a bit for readability.
22:0122:01, 18 January 2015 diff hist −313‎ PPU power up state ‎ Remove bullet point. Just noticed that the explanation is already given further down.
21:5621:56, 18 January 2015 diff hist −20‎ m PPU power up state ‎ Slight reformulation.
21:5521:55, 18 January 2015 diff hist +333‎ PPU power up state ‎ Explain why writes to certain registers are ignored after reset.

11:4711:47, 16 September 2014 diff hist −2‎ Visual circuit tutorial ‎ State early that we're dealing with NMOS

15:2715:27, 14 February 2014 diff hist +9‎ m Visual circuit tutorial ‎No edit summary
15:2615:26, 14 February 2014 diff hist +67‎ m Visual circuit tutorial ‎ Slight reformulation
15:2015:20, 14 February 2014 diff hist +4‎ m Visual circuit tutorial ‎No edit summary
15:1715:17, 14 February 2014 diff hist −1‎ m Visual circuit tutorial ‎No edit summary
15:1715:17, 14 February 2014 diff hist +246‎ Visual circuit tutorial ‎ Introduce the / notation the first time it appears

05:1805:18, 18 January 2014 diff hist −96‎ m Visual circuit tutorial ‎ Misc. minor cleanup
05:1305:13, 18 January 2014 diff hist 0‎ m Visual circuit tutorial ‎No edit summary

06:5706:57, 12 December 2013 diff hist +20‎ m File talk:Ntsc timing.png ‎No edit summary current
06:5606:56, 12 December 2013 diff hist +346‎ File talk:Ntsc timing.png ‎ Skipped tick on odd frames with rendering enabled

17:3917:39, 4 December 2013 diff hist +5‎ m Visual circuit tutorial ‎No edit summary
10:2110:21, 4 December 2013 diff hist −26‎ Visual circuit tutorial ‎ Rephrase to avoid "electrically common" as it gets confusing with the section that follows
09:1209:12, 4 December 2013 diff hist 0‎ m Visual circuit tutorial ‎No edit summary
09:0709:07, 4 December 2013 diff hist +1,546‎ Visual circuit tutorial ‎ Add examples to introductory sections and remove forum link

14:4114:41, 4 October 2013 diff hist +203‎ INES Mapper 005 ‎ Bandit Kings of Ancient China writes PRG RAM through the ROM area
11:0811:08, 4 October 2013 diff hist +166‎ INES Mapper 005 ‎ Clarify that split screen uses absolute screen positions within the split region

23:0123:01, 12 September 2013 diff hist +259‎ CPU interrupts ‎ Add short intro

12:1612:16, 10 September 2013 diff hist +74‎ APU ‎ The triangle's linear counter does not influence status in $4015 reads (confirmed in Visual 2A03 circuitry)

13:3013:30, 9 September 2013 diff hist +1‎ m APU DMC ‎No edit summary
13:1613:16, 9 September 2013 diff hist +473‎ APU DMC ‎ Clarify that the bits-remaining counter is always ticking

11:3911:39, 29 August 2013 diff hist +1‎ m CPU interrupts ‎No edit summary
11:3611:36, 29 August 2013 diff hist +102‎ CPU interrupts ‎ Try to be clearer about the output from the level detector
11:3311:33, 29 August 2013 diff hist 0‎ m CPU interrupts ‎No edit summary
11:3211:32, 29 August 2013 diff hist +136‎ CPU interrupts ‎ Rephrase detailed behavior in terms of edge and level detectors and fix CLI inaccuracy (the flag really changes during the "third" cycle, overlapping the opcode fetch)

07:1907:19, 26 August 2013 diff hist −6‎ m CPU interrupts ‎No edit summary
07:1607:16, 26 August 2013 diff hist +143‎ CPU interrupts ‎ All two-cycle instructions poll interrupts at the end of the first cycle (as a side note, this is why the branch instructions do too, since they can be two-cycle)
06:5306:53, 26 August 2013 diff hist +201‎ CPU interrupts ‎ NMI priority over IRQ
06:2706:27, 26 August 2013 diff hist +346‎ CPU interrupts ‎ Give possible explanation for why interrupts are sometimes said to be polled during the final cycle
06:1106:11, 26 August 2013 diff hist +1‎ m CPU interrupts ‎No edit summary
06:1006:10, 26 August 2013 diff hist +148‎ CPU interrupts ‎ Be clearer about how IRQ and NMI are similar
06:0306:03, 26 August 2013 diff hist +185‎ CPU interrupts ‎ A reset is basically just another interrupt type
05:5605:56, 26 August 2013 diff hist +16‎ m CPU interrupts ‎No edit summary
05:5405:54, 26 August 2013 diff hist −7‎ CPU interrupts ‎ s/during before/before/
05:5305:53, 26 August 2013 diff hist −5‎ CPU interrupts ‎ Branch instructions poll interrupts just before the second cycle (like all two-cycle instructions do)
05:4905:49, 26 August 2013 diff hist +70‎ CPU interrupts ‎ Interrupts are polled right before the PCH fixup cycle for branches. Looks like the interrupt hijacking timing was already correct.
05:3805:38, 26 August 2013 diff hist −56‎ CPU interrupts ‎ Interrupts are actually polled at the end of the second-to-last cycle (verified in Visual 6502, and doing it like that makes blargg's cpu_interrupts_v2 pass) (more changes coming)

21:3721:37, 20 August 2013 diff hist +377‎ User:Ulfalizer ‎ Read/write timing current
05:4105:41, 20 August 2013 diff hist +80‎ Mapper ‎ Make Disch's intro doc easier to find

03:1603:16, 19 August 2013 diff hist +112‎ Talk:INES Mapper 232 ‎No edit summary current

02:3502:35, 16 August 2013 diff hist +29‎ Arpeggio ‎ Needs moar arpeggio

09:0409:04, 15 August 2013 diff hist +45‎ APU Frame Counter ‎ The write delay was off by one CPU cycle too. Perhaps that compensated. (Derived from Visual 2A03.)
08:4408:44, 15 August 2013 diff hist +118‎ APU ‎ Sample restarting is delayed if the last sample byte of a previous sample is playing (rainwarrior)
08:3808:38, 15 August 2013 diff hist +99‎ APU Frame Counter ‎ The quarter and half frame signals are generated with a delay of one CPU cycle (see talk page)

14:2814:28, 13 August 2013 diff hist +1,133‎ Talk:APU Frame Counter ‎ Further confirmation that ticks might be off by .5
11:5011:50, 13 August 2013 diff hist +510‎ Talk:APU Frame Counter ‎ Some times off by .5?

17:2517:25, 6 August 2013 diff hist 0‎ File:Ntsc timing.png ‎ Ulfalizer uploaded a new version of "File:Ntsc timing.png": Specify where background shift registers shift and where they are reloaded at the end of the scanline.
17:2317:23, 6 August 2013 diff hist 0‎ File:Ppu.svg ‎ Ulfalizer uploaded a new version of "File:Ppu.svg": Some of the text in the notes didn't render for some reason.
17:1717:17, 6 August 2013 diff hist 0‎ File:Ppu.svg ‎ Ulfalizer uploaded a new version of "File:Ppu.svg": Specify where background shift registers shift and where they are reloaded at the end of the scanline.

02:1802:18, 22 July 2013 diff hist +121‎ Visual circuit tutorial ‎ Clarify that the left transistor in the inverter example is just a resistor
02:0302:03, 22 July 2013 diff hist +273‎ Visual circuit tutorial ‎ Add temporary link to hopefully un-confusing thread

19:4719:47, 19 July 2013 diff hist +121‎ PPU rendering ‎ Specify where the flag and X position loading happens during sprite loading (derived from Visual 2C02)

20:3920:39, 17 July 2013 diff hist +90‎ PPU registers ‎ Probably best to just ignore writes to $2004 during rendering for emulation
20:3620:36, 17 July 2013 diff hist +1‎ m PPU registers ‎No edit summary
20:3520:35, 17 July 2013 diff hist +109‎ PPU registers ‎ Sprite evaluation status might affect the glitchy OAMADDR increment when accessing OAMDATA during rendering
20:3120:31, 17 July 2013 diff hist +392‎ PPU registers ‎ Writes to OAMDATA during rendering do not modify memory but do bump OAMADDR in a glitchy way
17:4017:40, 17 July 2013 diff hist +180‎ PPU sprite evaluation ‎ Add internal details on the secondary OAM clear
16:1916:19, 17 July 2013 diff hist +8‎ m PPU sprite evaluation ‎No edit summary
16:1716:17, 17 July 2013 diff hist +1,161‎ PPU sprite evaluation ‎ Add likely explanation for the sprite overflow bug, derived from Visual 2C02

08:3808:38, 16 July 2013 diff hist +5,145‎ User:Ulfalizer ‎ Add signal trace for possible sprite overflow bug explanation

17:4417:44, 15 July 2013 diff hist +232‎ Visual circuit tutorial ‎ The DRAM rows become consecutive if we reverse the row selection bits

15:0615:06, 14 July 2013 diff hist +147‎ Talk:INES ‎ Last 4
09:4509:45, 14 July 2013 diff hist +368‎ Talk:INES ‎ Dirty ROM detection

13:0413:04, 12 July 2013 diff hist +125‎ Visual circuit tutorial ‎ Add link to transistor video on YouTube

23:3723:37, 5 July 2013 diff hist 0‎ User:Ulfalizer ‎ Mystery tick for sprite zero should read as 1 if ignoring propagation delays
23:0123:01, 5 July 2013 diff hist 0‎ m User:Ulfalizer ‎No edit summary
23:0023:00, 5 July 2013 diff hist +1,228‎ User:Ulfalizer ‎ Add timing for sprite zero/overflow flag clearing
00:5500:55, 5 July 2013 diff hist +270‎ User:Ulfalizer ‎ Add Visual 6502 IRQ link for reset
00:0400:04, 5 July 2013 diff hist +396‎ User:Ulfalizer ‎ Add Visual 6502 IRQ links for interrupt hijacking

22:1222:12, 4 July 2013 diff hist +3‎ m User:Ulfalizer ‎No edit summary
22:1222:12, 4 July 2013 diff hist +519‎ User:Ulfalizer ‎ Add Visual 6502 IRQ links for RTI/CLI/SEI/PLP
21:0821:08, 4 July 2013 diff hist +401‎ User:Ulfalizer ‎ Add Visual 6502 IRQ links for JMP Absolute/Indirect
20:2620:26, 4 July 2013 diff hist +723‎ User:Ulfalizer ‎ Add Visual 6502 IRQ links for branches
19:0019:00, 4 July 2013 diff hist +6‎ User:Ulfalizer ‎ Add ~NMIG signal to trace for NMI link

17:2817:28, 3 July 2013 diff hist +6‎ User:Ulfalizer ‎ Add State to NMI link
16:1616:16, 3 July 2013 diff hist +25‎ User:Ulfalizer ‎ Add nnT2BR and 646 (some kind of "sampling points for IRQ" signal) to the interrupt links
16:0016:00, 3 July 2013 diff hist −88‎ User:Ulfalizer ‎ Correct IRQ sampling location and add conditions
15:5115:51, 3 July 2013 diff hist +22‎ User:Ulfalizer ‎ Add IRQP and State to Visual 6502 interrupt links
09:2209:22, 3 July 2013 diff hist +66‎ The skinny on NES scrolling ‎ Status of increment bit does not influence what happens for $2007 access during rendering

20:0320:03, 2 July 2013 diff hist −4‎ m Tricky-to-emulate games ‎No edit summary
20:0220:02, 2 July 2013 diff hist +9‎ m Tricky-to-emulate games ‎No edit summary
12:0212:02, 2 July 2013 diff hist +79‎ Tricky-to-emulate games ‎ Add PPU palettes link for Micro Machines
11:5311:53, 2 July 2013 diff hist +14‎ Tricky-to-emulate games ‎ It's cannon balls, not bombs
11:5211:52, 2 July 2013 diff hist +298‎ Tricky-to-emulate games ‎ The Young Indiana Jones Chronicles accesses $2007 during rendering
11:2211:22, 2 July 2013 diff hist +399‎ PPU registers ‎ Flesh out master/slave mode description
10:1510:15, 2 July 2013 diff hist +397‎ Talk:PPU palettes ‎ Background palette hack and output to EXT pins
09:5809:58, 2 July 2013 diff hist +227‎ Talk:PPU palettes ‎ Unused palette data and EXT pins
08:5108:51, 2 July 2013 diff hist +89‎ Visual circuit tutorial ‎ Link org's PPU analysis too

19:0819:08, 1 July 2013 diff hist +54‎ PPU palettes ‎ Mention chroma and luma
14:4514:45, 1 July 2013 diff hist +150‎ PPU palettes ‎ The background palette "hack" is an intentional feature of the PPU

09:2809:28, 30 June 2013 diff hist +8‎ Visual circuit tutorial ‎ Has contributions from more people now, so don't imply I wrote everything

03:4303:43, 29 June 2013 diff hist −5‎ Visual circuit tutorial ‎ Use "zeroth" instead of "bottom-most" since it gets a bit confusing with the bit being at the top of the adder
03:3103:31, 29 June 2013 diff hist +18‎ m Visual circuit tutorial ‎ Style tweaks

15:0815:08, 28 June 2013 diff hist +124‎ Visual circuit tutorial ‎ Add link to PPU overview image.
15:0315:03, 28 June 2013 diff hist +251‎ Visual circuit tutorial ‎ Add link for extra node names repo.
14:4814:48, 28 June 2013 diff hist +41‎ N File:Ppuareas.png ‎ Overview of how the NTSC PPU is laid out. current
05:1605:16, 28 June 2013 diff hist +529‎ The skinny on NES scrolling ‎ The story with $2007 access during rendering is more complicated (but also pretty straightforward)
02:5202:52, 28 June 2013 diff hist +44‎ PPU power up state ‎ Reset signal only clears loopy's t, not v

18:4918:49, 27 June 2013 diff hist +2‎ PPU power up state ‎ Reset signals sets up an even frame
18:3018:30, 27 June 2013 diff hist +33‎ PPU power up state ‎ Internal reset signal also clears the $2007 read buffer
18:2318:23, 27 June 2013 diff hist +17‎ PPU power up state ‎ Clarify that dot 1 is the second dot
18:1918:19, 27 June 2013 diff hist +22‎ PPU power up state ‎ Fine x scroll is also cleared by the internal reset signal
18:1518:15, 27 June 2013 diff hist +396‎ PPU power up state ‎ Fill in details derived from Visual 2C02 for what happens on reset

21:3721:37, 18 June 2013 diff hist +9‎ m Talk:PPU rendering ‎ Wups... wasn't logged in

08:4008:40, 17 June 2013 diff hist +5,034‎ User:Ulfalizer ‎ Add some timing charts so I don't lose them

13:1013:10, 16 June 2013 diff hist +6‎ m Visual circuit tutorial ‎No edit summary

16:3916:39, 14 June 2013 diff hist +6‎ m Visual circuit tutorial ‎No edit summary
16:3716:37, 14 June 2013 diff hist +193‎ Visual circuit tutorial ‎ Add info on apu_clk2x signals
16:1316:13, 14 June 2013 diff hist +237‎ Visual circuit tutorial ‎ Superbuffers often appear on circuits with a large fan-out

15:5615:56, 13 June 2013 diff hist +9‎ APU Frame Counter ‎ Also specify reg
15:5515:55, 13 June 2013 diff hist +234‎ APU Frame Counter ‎ Add overview for the frame interrupt flag
05:5405:54, 13 June 2013 diff hist −2‎ m Visual circuit tutorial ‎ Use "similar" instead of "identical". You don't get lines and their inverses running in the mask ROM for example.
04:3304:33, 13 June 2013 diff hist +309‎ Game bugs ‎ Junk tiles in the overscan

00:3500:35, 12 June 2013 diff hist +1‎ m APU Length Counter ‎No edit summary current
00:3400:34, 12 June 2013 diff hist +145‎ APU Length Counter ‎ Might as well fill in the interpretation for base length 10 too
00:1100:11, 12 June 2013 diff hist 0‎ m Visual circuit tutorial ‎No edit summary

05:4305:43, 11 June 2013 diff hist −28‎ Visual circuit tutorial ‎ CPU pinout page doesn't mention RDY, so don't link it
05:1105:11, 11 June 2013 diff hist +1,282‎ Visual circuit tutorial ‎ Add section on 6502 cycle and phase timing
04:2204:22, 11 June 2013 diff hist +72‎ Visual circuit tutorial ‎ Precharge logic is now active in Visual 2C02
02:1902:19, 11 June 2013 diff hist +35‎ Visual circuit tutorial ‎ Be more specific than "left" and "right" now that there are three images for the cross-coupled inverter
02:0102:01, 11 June 2013 diff hist +99‎ Visual circuit tutorial ‎ Output drivers neither source nor sink for reads too
01:5501:55, 11 June 2013 diff hist −4‎ Visual circuit tutorial ‎ s/generates/sinks/ ("source" and "generate" are synonyms :P)
01:5301:53, 11 June 2013 diff hist +181‎ Visual circuit tutorial ‎ Output drivers can be tri-stated by activating neither the pull-up nor the pull-down transistors
00:5100:51, 11 June 2013 diff hist −11‎ CPU interrupts ‎ Interrupt polling actually happens on the falling edge of φ2

23:1723:17, 9 June 2013 diff hist +524‎ Visual circuit tutorial ‎ Add note on master clock and CPU/PPU clock alignment

22:2322:23, 6 June 2013 diff hist +67‎ User:Ulfalizer ‎ loopy_v writes use the same timing too
22:0922:09, 6 June 2013 diff hist +22‎ User:Ulfalizer ‎ Need to figure out setting timing for spr_overflow
22:0922:09, 6 June 2013 diff hist +64‎ User:Ulfalizer ‎ spr_overflow is read the same too
21:5621:56, 6 June 2013 diff hist +59‎ User:Ulfalizer ‎ spr0_hit is read like vbl_flag
21:4721:47, 6 June 2013 diff hist +60‎ User:Ulfalizer ‎ Add spr0_hit timing
21:2721:27, 6 June 2013 diff hist +1,062‎ Talk:Visual circuit tutorial ‎ Sizing current
16:3516:35, 6 June 2013 diff hist 0‎ User:Ulfalizer ‎ s/db/ab/
14:0414:04, 6 June 2013 diff hist −1‎ m Visual circuit tutorial ‎No edit summary
11:4211:42, 6 June 2013 diff hist +293‎ Visual circuit tutorial ‎ Add note on hashes and tildes on Visual 6502 node names (
01:4301:43, 6 June 2013 diff hist +1‎ m User:Ulfalizer ‎No edit summary

22:2322:23, 5 June 2013 diff hist +13‎ User:Ulfalizer ‎ _io_ce actually follows inverted M2
21:3921:39, 5 June 2013 diff hist +91‎ User:Ulfalizer ‎ More vbl_flag details
21:2721:27, 5 June 2013 diff hist +118‎ User:Ulfalizer ‎ vbl_flag timing
20:5720:57, 5 June 2013 diff hist +33‎ User:Ulfalizer ‎ _io_ce follows M2
20:5420:54, 5 June 2013 diff hist +87‎ User:Ulfalizer ‎ No built-in delay for '''rw''' in PPU
20:4920:49, 5 June 2013 diff hist +1,229‎ User:Ulfalizer ‎ Add signal timing from address decoder
20:2220:22, 5 June 2013 diff hist −35‎ m User:Ulfalizer ‎No edit summary
19:5419:54, 5 June 2013 diff hist +103‎ User:Ulfalizer ‎ Add link to IRQ pin
19:5219:52, 5 June 2013 diff hist +50‎ User:Ulfalizer ‎ rw changes during φ1
19:5019:50, 5 June 2013 diff hist +35‎ User:Ulfalizer ‎ Add ns timing for M2 duty cycle
19:4319:43, 5 June 2013 diff hist +53‎ User:Ulfalizer ‎ Address set during φ1
19:4119:41, 5 June 2013 diff hist +671‎ User:Ulfalizer ‎ Add interrupt timing info
19:2519:25, 5 June 2013 diff hist +65‎ User:Ulfalizer ‎ Add quick link to clocks section of tutorial
19:2419:24, 5 June 2013 diff hist +173‎ User:Ulfalizer ‎ Read/writes seem to happen during φ2
19:1519:15, 5 June 2013 diff hist +2,090‎ N User:Ulfalizer ‎ Bring together various timing stuff in one place
10:5210:52, 5 June 2013 diff hist 0‎ m Talk:Visual circuit tutorial ‎No edit summary
10:5110:51, 5 June 2013 diff hist +534‎ Talk:Visual circuit tutorial ‎ Component sizing

11:1711:17, 4 June 2013 diff hist −5‎ m Talk:Visual circuit tutorial ‎No edit summary
10:5910:59, 4 June 2013 diff hist +380‎ Talk:Visual circuit tutorial ‎ Circuit notation
10:5510:55, 4 June 2013 diff hist +285‎ Visual circuit tutorial ‎ Explain multiplexer
10:4310:43, 4 June 2013 diff hist +12‎ Visual circuit tutorial ‎ Boldface "VBlank"
10:4210:42, 4 June 2013 diff hist +4‎ Visual circuit tutorial ‎ Rephrase wire capacitance description a bit
10:3710:37, 4 June 2013 diff hist +490‎ Visual circuit tutorial ‎ Explain "floating" terminology and move wire capacitance section first to eliminate some backreferences

14:2214:22, 3 June 2013 diff hist −14‎ APU Length Counter ‎ Fix link to internal table
11:2011:20, 3 June 2013 diff hist +240‎ Visual circuit tutorial ‎ Link to image of similar circuit for clocked latch
11:1311:13, 3 June 2013 diff hist 0‎ Visual circuit tutorial ‎ PLA wikipedia link was broken
10:5810:58, 3 June 2013 diff hist +10‎ Visual circuit tutorial ‎ Be a bit clearer about m-to-n for decoders
10:5410:54, 3 June 2013 diff hist −5‎ m Visual circuit tutorial ‎No edit summary
10:5310:53, 3 June 2013 diff hist +378‎ Visual circuit tutorial ‎ Mention PLAs in conjunction with decoders and mask ROMs
10:4610:46, 3 June 2013 diff hist 0‎ Visual circuit tutorial ‎ Forgot to change the PLA picture
10:4610:46, 3 June 2013 diff hist +343‎ Visual circuit tutorial ‎ Rephrase PLA section in terms of decoder and mask ROMs
09:3809:38, 3 June 2013 diff hist +43‎ Visual circuit tutorial ‎ Add link to skinny for fine_x
09:3509:35, 3 June 2013 diff hist +3,171‎ Visual circuit tutorial ‎ Add section on shift registers
09:1109:11, 3 June 2013 diff hist +60‎ N File:Vis shift reg zoom.png ‎ Zoomed-in shift register for Visual 6502/2C02/2A03 tutorial.
09:1009:10, 3 June 2013 diff hist +50‎ N File:Vis shift reg.png ‎ Shift register for Visual 6502/2C02/2A03 tutorial.

20:2420:24, 2 June 2013 diff hist +36‎ NES reference guide ‎ Diagram is still useful for NES
20:0120:01, 2 June 2013 diff hist +224‎ Talk:Visual circuit tutorial ‎ PLA
19:4219:42, 2 June 2013 diff hist +2‎ m Talk:Visual circuit tutorial ‎No edit summary
19:4019:40, 2 June 2013 diff hist +452‎ Talk:Visual circuit tutorial ‎ PLA
19:2319:23, 2 June 2013 diff hist 0‎ m Talk:Visual circuit tutorial ‎No edit summary
19:2219:22, 2 June 2013 diff hist +272‎ Talk:Visual circuit tutorial ‎ PLA
18:5718:57, 2 June 2013 diff hist +285‎ Talk:Visual circuit tutorial ‎ PLA
16:0316:03, 2 June 2013 diff hist −312‎ Visual circuit tutorial ‎ Avoid the door analogy for gates (see http://forum.6502.org/viewtopic.php?f=1&t=2522&sid=9a19537b5579d427d670c45357dcbf07&start=15)
13:2113:21, 2 June 2013 diff hist +162‎ Visual circuit tutorial ‎ Mention "don't care" conditions for PLAs
10:0410:04, 2 June 2013 diff hist +53‎ Visual circuit tutorial ‎ Mention pull-up resistors in 'power sources' section
09:5209:52, 2 June 2013 diff hist +65‎ APU Length Counter ‎ Add link to visual circuit tutorial for the internal table
07:3907:39, 2 June 2013 diff hist +148‎ Visual circuit tutorial ‎ Add interpretation for one of the adder columns
07:0907:09, 2 June 2013 diff hist +224‎ Talk:Visual circuit tutorial ‎ Combined DRAM picture
07:0507:05, 2 June 2013 diff hist +55‎ Visual circuit tutorial ‎ Might be missed the first time, so add terms link for "via" in DRAM section too (probably overkill after that though)

20:4920:49, 1 June 2013 diff hist +157‎ Talk:Visual circuit tutorial ‎ Redraws
20:1420:14, 1 June 2013 diff hist +4‎ Visual circuit tutorial ‎ The values on the gates and not the gates themselves are the inputs to the NORs (while I'm nitpicking myself :P)
20:0520:05, 1 June 2013 diff hist +9‎ m Visual circuit tutorial ‎No edit summary
19:5919:59, 1 June 2013 diff hist +278‎ Talk:Visual circuit tutorial ‎No edit summary
19:5419:54, 1 June 2013 diff hist −4‎ Visual circuit tutorial ‎ You don't really get a current (except initially) in the steady state unless it goes to ground, so use "current" instead of "the current"
19:4919:49, 1 June 2013 diff hist +311‎ Talk:Visual circuit tutorial ‎No edit summary
19:3919:39, 1 June 2013 diff hist −2‎ m Visual circuit tutorial ‎No edit summary
19:3819:38, 1 June 2013 diff hist −2‎ Visual circuit tutorial ‎ Polish NOR description a bit
19:2319:23, 1 June 2013 diff hist −1‎ Visual circuit tutorial ‎ De-parenthesize
19:1419:14, 1 June 2013 diff hist 0‎ Visual circuit tutorial ‎ Settle on American spelling of "gray" (wasn't sure which one it was :P)
19:0219:02, 1 June 2013 diff hist +6‎ Visual circuit tutorial ‎ I still think a "hence" sounds better here
19:0019:00, 1 June 2013 diff hist +4‎ Visual circuit tutorial ‎ Be more specific about which open gates
18:5518:55, 1 June 2013 diff hist +3‎ m Visual circuit tutorial ‎No edit summary
18:5518:55, 1 June 2013 diff hist +78‎ Visual circuit tutorial ‎ Add current formulation for NOR gates section
18:5018:50, 1 June 2013 diff hist −1‎ Visual circuit tutorial ‎ s/white/grey/
18:4818:48, 1 June 2013 diff hist +19‎ Visual circuit tutorial ‎ Be more specific about the NOR
18:4718:47, 1 June 2013 diff hist −101‎ Visual circuit tutorial ‎ The highlight colors are no longer different in the picture
18:4618:46, 1 June 2013 diff hist +71‎ Visual circuit tutorial ‎ The picture for the cross-coupled inverter no longer matched the text
18:3418:34, 1 June 2013 diff hist +326‎ Talk:Visual circuit tutorial ‎ Steady state
18:1018:10, 1 June 2013 diff hist +162‎ m Talk:Visual circuit tutorial ‎No edit summary
17:5417:54, 1 June 2013 diff hist +842‎ Talk:Visual circuit tutorial ‎ Steady state, currents, and voltages
14:1714:17, 1 June 2013 diff hist +1‎ Visual circuit tutorial ‎ Left off a '/' in the adder truth table
14:1614:16, 1 June 2013 diff hist −101‎ Visual circuit tutorial ‎ Tableify adder truth table
14:0214:02, 1 June 2013 diff hist +2,113‎ Visual circuit tutorial ‎ Add sections on adders and barrel shifters (still need to fix table)
13:5113:51, 1 June 2013 diff hist +50‎ N File:Vis barrel shifter.png ‎ Barrel shifter for Visual 6502/2C02/2A03 tutorial. current
13:5113:51, 1 June 2013 diff hist +41‎ N File:Vis adder.png ‎ Adder for Visual 6502/2C02/2A03 tutorial.
07:1907:19, 1 June 2013 diff hist +1‎ m Visual circuit tutorial ‎No edit summary
07:1807:18, 1 June 2013 diff hist +457‎ Visual circuit tutorial ‎ Mention depletion and enhancement mode
06:0706:07, 1 June 2013 diff hist +359‎ Visual circuit tutorial ‎ Explain open/closed terminology ambiguity
05:4405:44, 1 June 2013 diff hist +104‎ Talk:Visual circuit tutorial ‎ Add "high" as a terminology option
05:2205:22, 1 June 2013 diff hist +810‎ Talk:Visual circuit tutorial ‎ Terminology

13:2713:27, 31 May 2013 diff hist −496‎ Visual circuit tutorial ‎ Not really sure about the enhancement/depletion etymology now, and shouldn't guess. Maybe it belongs in the 'terms' section too...
13:0313:03, 31 May 2013 diff hist −4‎ m Visual circuit tutorial ‎No edit summary
13:0013:00, 31 May 2013 diff hist −142‎ Visual circuit tutorial ‎ Depletion-mode description was likely incorrect
11:2011:20, 31 May 2013 diff hist +90‎ Visual circuit tutorial ‎ Depletion-mode transistors are only relevant for power sources
11:1611:16, 31 May 2013 diff hist +89‎ Visual circuit tutorial ‎ The low-level details of power sources aren't simulated
11:0611:06, 31 May 2013 diff hist +463‎ Visual circuit tutorial ‎ Explain enhancement and depletion mode transistors
10:1510:15, 31 May 2013 diff hist +34‎ Visual circuit tutorial ‎ Row lines are sometimes called "word lines"
09:3709:37, 31 May 2013 diff hist +18‎ Visual circuit tutorial ‎ Boldface pclk0 in DRAM refresh section
09:1409:14, 31 May 2013 diff hist +130‎ Talk:Visual circuit tutorial ‎ Switched back meaning of "open" and "closed"
08:5808:58, 31 May 2013 diff hist −249‎ Visual circuit tutorial ‎ Undo revision 6558 by Ulfalizer (talk) (Not so sure anymore... wait a bit. See talk page.)
08:5608:56, 31 May 2013 diff hist +345‎ Talk:Visual circuit tutorial ‎ "Open" and "closed"
08:3808:38, 31 May 2013 diff hist +249‎ Visual circuit tutorial ‎ Switch "open" and "closed" terminology for gates; feedback from http://forum.6502.org/viewtopic.php?f=1&t=2522
07:1307:13, 31 May 2013 diff hist +356‎ Talk:Visual circuit tutorial ‎ Add link to SVGs
02:2802:28, 31 May 2013 diff hist +279‎ Talk:Visual circuit tutorial ‎ Circuit labels

16:4716:47, 30 May 2013 diff hist −1‎ Visual circuit tutorial ‎ Make PLA section less paragraphy
15:2715:27, 30 May 2013 diff hist 0‎ File:Vid sram.png ‎ Ulfalizer uploaded a new version of "File:Vid sram.png": pngcrush'd the image.
15:2415:24, 30 May 2013 diff hist 0‎ File:Vis addr pla.png ‎ Ulfalizer uploaded a new version of "File:Vis addr pla.png": pngcrush'd the image. current
15:2215:22, 30 May 2013 diff hist 0‎ File:Vis len pla zoom.png ‎ Ulfalizer uploaded a new version of "File:Vis len pla zoom.png": pngcrush'd the image.
15:2115:21, 30 May 2013 diff hist 0‎ File:Vis da conversion.png ‎ Ulfalizer uploaded a new version of "File:Vis da conversion.png": pngcrush'd the image.
15:1915:19, 30 May 2013 diff hist 0‎ File:Vis len pla.png ‎ Ulfalizer uploaded a new version of "File:Vis len pla.png": Gah... uploaded the wrong image
15:1715:17, 30 May 2013 diff hist 0‎ File:Vis len pla.png ‎ Ulfalizer uploaded a new version of "File:Vis len pla.png": pngcrush'd the image.
15:1515:15, 30 May 2013 diff hist 0‎ File:Vis areas.png ‎ Ulfalizer uploaded a new version of "File:Vis areas.png": pngcrush'd the image.
13:4313:43, 30 May 2013 diff hist −815‎ Talk:Power Pad ‎ De-spam
13:2213:22, 30 May 2013 diff hist 0‎ m Visual circuit tutorial ‎No edit summary
13:2013:20, 30 May 2013 diff hist +58‎ Visual circuit tutorial ‎ (Hopefully) improve styling in PLA section
13:0613:06, 30 May 2013 diff hist +24‎ Visual circuit tutorial ‎ Tableify index-to-length map
12:5212:52, 30 May 2013 diff hist +3,349‎ Visual circuit tutorial ‎ Add section on PLAs (still a bit rough)
12:2412:24, 30 May 2013 diff hist +55‎ N File:Vis addr pla.png ‎ Address decoder PLA for Visual 6502/2C02/2A03 tutorial.
12:2312:23, 30 May 2013 diff hist +64‎ N File:Vis len pla zoom.png ‎ Zoomed-in length counter PLA for Visual 6502/2C02/2A03 tutorial.
12:2212:22, 30 May 2013 diff hist +54‎ N File:Vis len pla.png ‎ Length counter PLA for Visual 6502/2C02/2A03 tutorial.
07:4707:47, 30 May 2013 diff hist −18‎ APU Length Counter ‎ Only need to mention the approximations for base length 10
07:4407:44, 30 May 2013 diff hist +22‎ APU Length Counter ‎ MSB selects note base length
07:3707:37, 30 May 2013 diff hist −116‎ APU Length Counter ‎ No longer guesses... :P
07:3607:36, 30 May 2013 diff hist +10‎ APU Length Counter ‎ Reformat table a bit
04:0504:05, 30 May 2013 diff hist 0‎ APU Length Counter ‎ Inconsistent arrow format
03:3503:35, 30 May 2013 diff hist −3‎ m APU Length Counter ‎No edit summary
03:3103:31, 30 May 2013 diff hist +76‎ APU Length Counter ‎ Point out the different regions of the table
02:5602:56, 30 May 2013 diff hist +10‎ APU Length Counter ‎ Clarify legend
02:5502:55, 30 May 2013 diff hist +93‎ APU Length Counter ‎ Order is the same as in the internal APU LUT
02:5102:51, 30 May 2013 diff hist +157‎ Talk:APU Length Counter ‎ Table interpretation
02:4902:49, 30 May 2013 diff hist +1,195‎ APU Length Counter ‎ Explain table structure
00:3400:34, 30 May 2013 diff hist +1,104‎ Talk:APU Length Counter ‎ Table structure

08:5208:52, 29 May 2013 diff hist +280‎ Talk:Visual circuit tutorial ‎ Pictures
03:0803:08, 29 May 2013 diff hist +6‎ NES reference guide ‎ More specific link name
01:1701:17, 29 May 2013 diff hist +42‎ Visual circuit tutorial ‎ Add Wikipedia link for "substrate"
00:5500:55, 29 May 2013 diff hist +1‎ m Visual circuit tutorial ‎ Grammar fixes
00:5000:50, 29 May 2013 diff hist +5‎ m Visual circuit tutorial ‎No edit summary
00:2800:28, 29 May 2013 diff hist +11‎ Visual circuit tutorial ‎ Add terms section link for "NMOS"

23:3823:38, 28 May 2013 diff hist +5‎ m Visual circuit tutorial ‎No edit summary
23:3623:36, 28 May 2013 diff hist +43‎ Visual circuit tutorial ‎ Add small note about alignment for the palette SRAM cells
23:3523:35, 28 May 2013 diff hist +377‎ Visual circuit tutorial ‎ Add SRAM section
23:2723:27, 28 May 2013 diff hist +46‎ N File:Vid sram.png ‎ SRAM cells for Visual 6502/2C02/2A03 tutorial.
23:2523:25, 28 May 2013 diff hist +25‎ Visual circuit tutorial ‎ Linkify first mention of Visual 6502
22:5022:50, 28 May 2013 diff hist +2,470‎ Visual circuit tutorial ‎ Complete DRAM description
12:0512:05, 28 May 2013 diff hist +70‎ m Visual circuit tutorial ‎No edit summary
12:0012:00, 28 May 2013 diff hist +1‎ m Visual circuit tutorial ‎No edit summary
11:4111:41, 28 May 2013 diff hist +45‎ m Talk:Visual circuit tutorial ‎No edit summary
11:4111:41, 28 May 2013 diff hist +362‎ Talk:Visual circuit tutorial ‎ Picture-heavy
11:3211:32, 28 May 2013 diff hist +824‎ Visual circuit tutorial ‎ Save work in progress on DRAM to not lose it
11:1211:12, 28 May 2013 diff hist +52‎ N File:Vis oam left.png ‎ Left side of OAM for Visual 6502/2C02/2A03 tutorial. current
11:1111:11, 28 May 2013 diff hist +53‎ N File:Vis oam right.png ‎ Right side of OAM for Visual 6502/2C02/2A03 tutorial. current
11:0911:09, 28 May 2013 diff hist +45‎ N File:Vis dram cell.png ‎ DRAM cell for Visual 6502/2C02/2A03 tutorial.
11:0411:04, 28 May 2013 diff hist +46‎ Visual circuit tutorial ‎ Add links to APU clocks section for 'apu_clk1'
07:0307:03, 28 May 2013 diff hist +294‎ Talk:Visual circuit tutorial ‎No edit summary
05:5605:56, 28 May 2013 diff hist +19‎ m Talk:Visual circuit tutorial ‎No edit summary
05:4905:49, 28 May 2013 diff hist −3‎ m Talk:Visual circuit tutorial ‎No edit summary
05:4805:48, 28 May 2013 diff hist +67‎ m Talk:Visual circuit tutorial ‎ (Possibly) clarify some more what confuses me :)
05:4305:43, 28 May 2013 diff hist +20‎ m Talk:Visual circuit tutorial ‎No edit summary
05:4305:43, 28 May 2013 diff hist +410‎ Talk:Visual circuit tutorial ‎ Possible NMOS clarifications
05:0605:06, 28 May 2013 diff hist +186‎ Visual circuit tutorial ‎ Transistors can be selected separately
03:2003:20, 28 May 2013 diff hist +30‎ m Visual circuit tutorial ‎No edit summary

22:4222:42, 27 May 2013 diff hist +6‎ m Visual circuit tutorial ‎No edit summary
21:4721:47, 27 May 2013 diff hist +106‎ Visual circuit tutorial ‎ Clarify how pclk0 and pclk1 correspond to phases
07:4007:40, 27 May 2013 diff hist +288‎ Visual circuit tutorial ‎ Add tip on getting rid of highlighting
07:2807:28, 27 May 2013 diff hist +38‎ Visual circuit tutorial ‎ Add Wikipedia link for "passivation"
03:5703:57, 27 May 2013 diff hist 0‎ Visual circuit tutorial ‎ Use "pad" instead of "pin" for the internal version
03:5603:56, 27 May 2013 diff hist +179‎ Visual circuit tutorial ‎ Add definition for "bond wire"
03:4303:43, 27 May 2013 diff hist +58‎ PPU ‎ Add link to frame timing diagram
03:4103:41, 27 May 2013 diff hist +98‎ Visual 2C02 ‎ Add link to PPU timing diagram
02:5602:56, 27 May 2013 diff hist 0‎ m Visual circuit tutorial ‎No edit summary
02:3402:34, 27 May 2013 diff hist +672‎ Visual circuit tutorial ‎ Add description of the video DAC
02:2402:24, 27 May 2013 diff hist +45‎ N File:Vis vid dac.png ‎ Video DAC for Visual 6502/2C02/2A03 tutorial.
02:0502:05, 27 May 2013 diff hist +2‎ Visual circuit tutorial ‎ Ops... s/resistor/transistor/
01:5901:59, 27 May 2013 diff hist +85‎ Visual circuit tutorial ‎ Add "pull-down resistor" to terms
01:5701:57, 27 May 2013 diff hist +378‎ Visual circuit tutorial ‎ Add description of output drivers
01:5001:50, 27 May 2013 diff hist +49‎ N File:Vis output driver.png ‎ Output driver for Visual 6502/2C02/2A03 tutorial.
01:1601:16, 27 May 2013 diff hist +12‎ m Visual circuit tutorial ‎No edit summary
01:1301:13, 27 May 2013 diff hist +304‎ Visual circuit tutorial ‎ Add information on PPU clocks

22:3622:36, 26 May 2013 diff hist +72‎ m Visual circuit tutorial ‎ Minor formatting changes
21:4321:43, 26 May 2013 diff hist +4‎ m Visual circuit tutorial ‎No edit summary
19:2319:23, 26 May 2013 diff hist +4‎ m Visual circuit tutorial ‎No edit summary
18:2918:29, 26 May 2013 diff hist −13‎ m Visual circuit tutorial ‎ "half-cycle" only needs to be explained once
18:1618:16, 26 May 2013 diff hist −31‎ CPU pinout ‎ Remove inline description of "duty cycle" and add glossary link instead
18:1518:15, 26 May 2013 diff hist −30‎ Visual circuit tutorial ‎ Add glossary link for "duty cycle"
18:1418:14, 26 May 2013 diff hist +195‎ Glossary ‎No edit summary
17:0817:08, 26 May 2013 diff hist +2‎ m Visual circuit tutorial ‎No edit summary
16:5516:55, 26 May 2013 diff hist +1,217‎ Visual circuit tutorial ‎ Add information on clock signals (work in progress)

16:0216:02, 25 May 2013 diff hist +6‎ m Visual circuit tutorial ‎No edit summary
15:5415:54, 25 May 2013 diff hist −288‎ Hardware misc ‎ Replace with redirect to 'NES reference guide' current
15:5215:52, 25 May 2013 diff hist +161‎ NES reference guide ‎ Merge in the 'Hardware misc' page. It's just a few links anyway.
15:1215:12, 25 May 2013 diff hist +360‎ N Talk:Hardware misc ‎ Created page with "Thinking of merging this into the main reference page, perhaps under a "miscellaneous" sublist. It's a very small number of links, and IMO a separate p..."
14:5814:58, 25 May 2013 diff hist +11‎ m Visual circuit tutorial ‎ Add link to terms section for "NMOS"
14:4914:49, 25 May 2013 diff hist 0‎ m 6502 instructions ‎No edit summary
14:4514:45, 25 May 2013 diff hist +116‎ 6502 instructions ‎ Add link to Visual circuit tutorial
14:4114:41, 25 May 2013 diff hist +89‎ Hardware misc ‎ Add link to visual circuit tutorial
14:3814:38, 25 May 2013 diff hist +162‎ Visual 2C02 ‎ Add link to visual circuit tutorial
03:3303:33, 25 May 2013 diff hist +6‎ m Visual circuit tutorial ‎No edit summary
03:3103:31, 25 May 2013 diff hist +666‎ Visual circuit tutorial ‎ Add DA conversion and cut-off connection examples
03:1303:13, 25 May 2013 diff hist +56‎ N File:Vis cutoff.png ‎ "Cut-off" poly strip for Visual 6502/2C02/2A03 tutorial.
03:1203:12, 25 May 2013 diff hist +60‎ N File:Vis da conversion.png ‎ D/A conversion circuitry for Visual 6502/2C02/2A03 tutorial.
00:4700:47, 25 May 2013 diff hist −11‎ Visual circuit tutorial ‎ Oh, wait, it wasn't...
00:4500:45, 25 May 2013 diff hist +11‎ Visual circuit tutorial ‎ NOR interpretation was off
00:4400:44, 25 May 2013 diff hist +337‎ Visual circuit tutorial ‎ Use the term SR latch and add the NOR interpretation
00:1900:19, 25 May 2013 diff hist +84‎ Visual circuit tutorial ‎ Nodes can also be traced by numeric ID
00:0900:09, 25 May 2013 diff hist +33‎ Visual circuit tutorial ‎ Polysilicon is often shortened to just "poly"

23:0623:06, 24 May 2013 diff hist −8‎ Visual circuit tutorial ‎ Fix bullet list format
19:3319:33, 24 May 2013 diff hist +14‎ m Visual circuit tutorial ‎No edit summary
19:2919:29, 24 May 2013 diff hist +396‎ Visual circuit tutorial ‎ Add tip on downloading a local copy
19:0119:01, 24 May 2013 diff hist 0‎ Visual circuit tutorial ‎ top<->bottom
19:0019:00, 24 May 2013 diff hist +476‎ Visual circuit tutorial ‎ Add information on the layers that make up the chip
18:5418:54, 24 May 2013 diff hist +13‎ Visual circuit tutorial ‎ s/VBL/VBlank/
18:5318:53, 24 May 2013 diff hist +117‎ Visual circuit tutorial ‎ _db7 connection might've been a bit unclear
18:4518:45, 24 May 2013 diff hist +1‎ m Visual circuit tutorial ‎No edit summary
18:3718:37, 24 May 2013 diff hist +487‎ Visual circuit tutorial ‎ Add NMOS to terms section
18:2618:26, 24 May 2013 diff hist −1‎ m Visual circuit tutorial ‎No edit summary
18:2518:25, 24 May 2013 diff hist +134‎ Visual circuit tutorial ‎ Add 'burried contact' and 'via' to terms section
18:2318:23, 24 May 2013 diff hist 0‎ Visual circuit tutorial ‎ Sort terms alphabetically
18:2118:21, 24 May 2013 diff hist +119‎ Visual circuit tutorial ‎ Clarify that w400e lets through a data bus bit
18:1118:11, 24 May 2013 diff hist +2‎ m Visual circuit tutorial ‎No edit summary
18:1018:10, 24 May 2013 diff hist +6‎ m Visual circuit tutorial ‎No edit summary
18:0818:08, 24 May 2013 diff hist +45‎ Visual circuit tutorial ‎ Misc. polishing
17:5817:58, 24 May 2013 diff hist +302‎ Visual circuit tutorial ‎ Ditto
17:4417:44, 24 May 2013 diff hist +6,813‎ N Visual circuit tutorial ‎ WIP - just so that I don't lose edits so far by accident
17:2917:29, 24 May 2013 diff hist +68‎ N File:Vis vblbuf.png ‎ Wire capacitance storage element for Visual 6502/2C02/2A03 tutorial.
17:2817:28, 24 May 2013 diff hist +46‎ N File:Vis transistor.png ‎ Transistor for Visual 6502/2C02/2A03 tutorial.
17:2817:28, 24 May 2013 diff hist +48‎ N File:Vis power.png ‎ Powered node for Visual 6502/2C02/2A03 tutorial.
17:2717:27, 24 May 2013 diff hist +44‎ N File:Vis nor.png ‎ Nor gate for Visual 6502/2C02/2A03 tutorial.
17:2617:26, 24 May 2013 diff hist +44‎ N File:Vis inverter.png ‎ Inverter for Visual 6502/2C02/2A03 tutorial.
17:2617:26, 24 May 2013 diff hist +64‎ N File:Vis crossreg.png ‎ Cross-coupled inverter latch for Visual 6502/2C02/2A03 tutorial.
17:2517:25, 24 May 2013 diff hist +47‎ N File:Vis clockedreg.png ‎ Clocked reg for Visual 6502/2C02/2A03 tutorial.
17:2417:24, 24 May 2013 diff hist +51‎ N File:Vis areas.png ‎ Different areas for Visual 6502/2C02/2A03 tutorial.

05:4605:46, 23 May 2013 diff hist +11‎ APU Triangle ‎ Be more specific about what Mega Man 2 does
05:1805:18, 23 May 2013 diff hist +357‎ APU Triangle ‎ Add note about what causes popping sounds in the triangle in some games and how they can be eliminated in an emulator

20:3720:37, 22 May 2013 diff hist +17‎ PPU pinout ‎ Explain AD abbreviation
20:3420:34, 22 May 2013 diff hist +99‎ m Talk:PPU pinout ‎ Add qualification :P
20:3220:32, 22 May 2013 diff hist +16‎ PPU pinout ‎ Call the control register PPUCTRL and add link to PPU registers page
20:2020:20, 22 May 2013 diff hist −2‎ m Talk:PPU pinout ‎ s/inputs/pins/
20:1820:18, 22 May 2013 diff hist +450‎ Talk:PPU pinout ‎No edit summary
19:4519:45, 22 May 2013 diff hist +60‎ CPU ‎ Add nanoseconds per cycle for the different CPU frequencies
18:1818:18, 22 May 2013 diff hist +12‎ m PPU ‎No edit summary
18:0418:04, 22 May 2013 diff hist +523‎ Talk:PPU pinout ‎ Rename some pins?
17:5917:59, 22 May 2013 diff hist +62‎ PPU pinout ‎ Add link to wiring diagram
17:5617:56, 22 May 2013 diff hist +23‎ PPU pinout ‎ Explain ALE abbreviation
17:5517:55, 22 May 2013 diff hist +124‎ PPU pinout ‎ Clarify the CPU side of things
17:4917:49, 22 May 2013 diff hist +80‎ PPU pinout ‎ /WR does not assert for writes to the palette
17:3017:30, 22 May 2013 diff hist −32‎ PPU pinout ‎ ALE doesn't "tell the PPU" - it's an output pin
17:2417:24, 22 May 2013 diff hist +87‎ PPU pinout ‎ Add some more ALE details
17:1917:19, 22 May 2013 diff hist +55‎ PPU pinout ‎ Add link to 'PPU rendering' for ALE details
17:1617:16, 22 May 2013 diff hist +52‎ PPU ‎ Add pinout link
13:4613:46, 22 May 2013 diff hist −6‎ 6502 instructions ‎ 'CPU interrupt quirks' was moved to 'CPU interrupts'
13:4513:45, 22 May 2013 diff hist −8‎ Emulator tests ‎ 'CPU interrupt quirks' was moved to 'CPU interrupts'
13:4413:44, 22 May 2013 diff hist −33‎ CPU pinout ‎ 'CPU interrupt quirks' was moved to 'CPU interrupts'
13:4313:43, 22 May 2013 diff hist −6‎ CPU ‎ 'CPU interrupt quirks' was moved to 'CPU interrupts'
13:4113:41, 22 May 2013 diff hist 0‎ m Talk:CPU interrupts ‎ Ulfalizer moved page Talk:CPU interrupt quirks to Talk:CPU interrupts: It is about more than just "quirks"
13:4113:41, 22 May 2013 diff hist +33‎ N Talk:CPU interrupt quirks ‎ Ulfalizer moved page Talk:CPU interrupt quirks to Talk:CPU interrupts: It is about more than just "quirks" current
13:4113:41, 22 May 2013 diff hist +28‎ N CPU interrupt quirks ‎ Ulfalizer moved page CPU interrupt quirks to CPU interrupts: It is about more than just "quirks" current
13:4113:41, 22 May 2013 diff hist 0‎ m CPU interrupts ‎ Ulfalizer moved page CPU interrupt quirks to CPU interrupts: It is about more than just "quirks"
13:2213:22, 22 May 2013 diff hist +47‎ CPU pinout ‎ Specify that every cycle is either a read or a write cycle
13:2013:20, 22 May 2013 diff hist +233‎ CPU pinout ‎ Add some more timing details for Axx, Dx, and R/W (confirmed in Visual 6502)
12:5912:59, 22 May 2013 diff hist +500‎ N Talk:CPU interrupts ‎ Add some relevant Visual 6502 links so I don't lose them
12:4612:46, 22 May 2013 diff hist +110‎ CPU interrupts ‎ Interrupt polling occurs during φ1 (confirmed in Visual 6502)
12:3512:35, 22 May 2013 diff hist +189‎ CPU pinout ‎ Clarify that φ1 and φ2 high denote the first and second phases of each CPU cycle

09:3109:31, 15 May 2013 diff hist −6‎ PPU rendering ‎ s/VRAM data input pins/VRAM data pins/
07:0507:05, 15 May 2013 diff hist +32‎ PPU rendering ‎ VRAM addresses are 14 bits long, not 16 bits
06:5606:56, 15 May 2013 diff hist +14‎ PPU rendering ‎ VRAM data can also be written by the PPU (on demand from the CPU)
06:5106:51, 15 May 2013 diff hist +839‎ PPU rendering ‎ Explain why VRAM reads take two PPU cycles
06:0606:06, 15 May 2013 diff hist +1‎ INES Mapper 004 ‎ Link to PPU Rendering instead of directly to the frame timing diagram
06:0206:02, 15 May 2013 diff hist +700‎ PPU rendering ‎ Add details on PPU address bus contents (derived from Visual 2C02)

14:4314:43, 9 May 2013 diff hist +115‎ APU DMC ‎ Enumerate things that can affect the counter
14:3514:35, 9 May 2013 diff hist +47‎ APU DMC ‎ Clarify that the rate only affects automatic sample playback
14:2714:27, 9 May 2013 diff hist +220‎ APU ‎ Add output conditions for the DMC channel

19:5419:54, 8 May 2013 diff hist +208‎ APU DMC ‎ Clarify what the rate value specifies
17:1317:13, 8 May 2013 diff hist +3‎ m APU DMC ‎ Fix typo

15:0315:03, 7 May 2013 diff hist +50‎ APU Sweep ‎ Sweep needs to be enabled too to adjust the period :P

14:5614:56, 6 May 2013 diff hist +230‎ APU Sweep ‎ Note that the silencing overflow still happens with a shift count of zero (confirmed in Visual 2A03)
13:4313:43, 6 May 2013 diff hist +22‎ APU Pulse ‎ Small sweep clarification
12:3012:30, 6 May 2013 diff hist +45‎ APU Pulse ‎ Output conditions were missing timer >= 8
12:2412:24, 6 May 2013 diff hist +135‎ APU Triangle ‎ Specify exactly where the waveform clocking happens
12:1112:11, 6 May 2013 diff hist +7‎ APU Pulse ‎ Specify exactly where the waveform clocking happens
09:3609:36, 6 May 2013 diff hist +289‎ APU Sweep ‎ Clarify that the silencing-even-when-disabled behavior is only relevant for overflow
09:0909:09, 6 May 2013 diff hist +88‎ APU Length Counter ‎ Constant volume flag was missing, making it look like the volume/envelope field is 5 bits long. Also make consistent with main page by using 'v' instead of 'e'.
09:0209:02, 6 May 2013 diff hist +17‎ APU Length Counter ‎ The triangle halt flag was renamed to linear counter reload flag

14:0314:03, 5 May 2013 diff hist +38‎ APU Sweep ‎ Small silencing clarification
13:2213:22, 5 May 2013 diff hist +68‎ APU Envelope ‎ Clarify when the envelope counter decrement occurs
12:4312:43, 5 May 2013 diff hist +3‎ m APU Sweep ‎ Add an 'is'
12:4012:40, 5 May 2013 diff hist +389‎ APU Sweep ‎ Describe exactly when the period update happens and use the internal version of what's going in instead of the "clocked before reload" version (as it isn't any more complicated)
12:1112:11, 5 May 2013 diff hist −4‎ m APU Length Counter ‎ Fix typo
09:4909:49, 5 May 2013 diff hist +77‎ APU Sweep ‎ Internally, the target period is calculated continuously by the adder
09:2809:28, 5 May 2013 diff hist −99‎ APU Length Counter ‎ Ops... the length counter load values in the table are already adjusted to account for the becomes zero vs. is zero behavior
08:3808:38, 5 May 2013 diff hist +50‎ APU Length Counter ‎ Clarify that the clock-when-zero silencing behavior works intuitively with the halt flag too
08:1008:10, 5 May 2013 diff hist +10‎ m APU Length Counter ‎ s/APU clock/frame counter clock/
08:0708:07, 5 May 2013 diff hist +526‎ APU Length Counter ‎ The length counter period might be off by one if you just compare against zero (confirmed in Visual 2A03)

13:5513:55, 4 May 2013 diff hist +1‎ m APU ‎ s/pulse channel/pulse channels/
09:0909:09, 4 May 2013 diff hist +504‎ PPU registers ‎ Use fancy-schmancy line drawing characters
08:2708:27, 4 May 2013 diff hist +27‎ m APU ‎ Rephrase pulse silencing exceptions a bit
08:1608:16, 4 May 2013 diff hist +50‎ m APU ‎ Clarify that channels play iff length counters > 0 in the abstract model
08:1008:10, 4 May 2013 diff hist +556‎ APU ‎ Add an overview of when channels will play (bit redundant, but imo justified in this case)
07:3307:33, 4 May 2013 diff hist 0‎ m APU Envelope ‎ Missed an s/N/V/
07:3007:30, 4 May 2013 diff hist +34‎ APU Envelope ‎ Use V to denote volume/envelope bits to be consistent with main page
07:1607:16, 4 May 2013 diff hist +153‎ APU Envelope ‎ Clarify that the constant volume flag only selects the volume source (verified in Visual 2A03)
06:2506:25, 4 May 2013 diff hist 0‎ m APU Pulse ‎ Linkify first instead of second mention of envelope
06:1806:18, 4 May 2013 diff hist +54‎ APU Noise ‎ Constant volume flag was missing, making it look like the volume/envelope field is 5 bits long. Also make consistent with main page by using 'v' instead of 'e'.
06:1406:14, 4 May 2013 diff hist 0‎ APU ‎ Bit field for noise volume/envelope used N while legend used V. Settle for V for consistency with other channels.
06:1206:12, 4 May 2013 diff hist 0‎ APU Pulse ‎ Use v to denote volume/envelope bits to be consistent with main page
06:1006:10, 4 May 2013 diff hist +62‎ APU Pulse ‎ Constant volume flag was missing, making it look like the volume/envelope field is 5 bits long
06:0406:04, 4 May 2013 diff hist +44‎ APU Pulse ‎ Main page says volume/envelope, so do that here too

11:1111:11, 3 May 2013 diff hist +249‎ APU Triangle ‎ The triangle channel's frequency is not limited like the pulse channels' is (confirmed in http://forums.nesdev.com/viewtopic.php?f=3&t=10056&start=15#p111702)
06:2206:22, 3 May 2013 diff hist +61‎ APU Length Counter ‎ Old version made it sound like the silencing was optional too
06:1806:18, 3 May 2013 diff hist −9‎ APU ‎ "Length counter halt" is more descriptive than "length counter disable" and consistent with the linked subpages for the channels
06:1206:12, 3 May 2013 diff hist −22‎ m APU Envelope ‎ Minor clarifications (iiutc the envelope is always ticking, even in constant volume mode)
05:5805:58, 3 May 2013 diff hist +23‎ APU Envelope ‎ Be more specific about what C does
05:5505:55, 3 May 2013 diff hist +57‎ APU Envelope ‎ Add Wikipedia link for ADSR
05:2505:25, 3 May 2013 diff hist +20‎ APU Triangle ‎ Use "linear counter reload flag" instead of "halt flag" to avoid confusion with the length counter halt flag

02:3002:30, 2 May 2013 diff hist +124‎ APU ‎ Clarify why it's called the "linear" counter
01:2201:22, 2 May 2013 diff hist +122‎ APU Triangle ‎ The triangle period timer ticks at the rate of the CPU clock
01:1701:17, 2 May 2013 diff hist 0‎ m APU Pulse ‎ s/KHz/kHz/
01:0101:01, 2 May 2013 diff hist +229‎ APU Pulse ‎ The pulse channels are silenced when t < 8 (confirmed in Visual 2A03, see http://forums.nesdev.com/viewtopic.php?f=3&t=10056&p=111614#p111614)
00:5400:54, 2 May 2013 diff hist +55‎ APU ‎ The pulse channels are silenced when t < 8 (confirmed in Visual 2A03, see http://forums.nesdev.com/viewtopic.php?f=3&t=10056&p=111614#p111614)

03:4003:40, 30 April 2013 diff hist +459‎ Talk:APU Sweep ‎No edit summary

05:3005:30, 29 April 2013 diff hist +705‎ N Talk:APU/current ‎ Created page with "Looking at Visual 2A03 and e.g. the sq0_on and sq0_len nodes, it seems that disabling a channel doesn't touch the length counter at all. Rather, there are internal channel ena..."
02:1702:17, 29 April 2013 diff hist +43‎ APU Pulse ‎ Make the timer description be closer to the hw reality
01:2601:26, 29 April 2013 diff hist +189‎ Talk:APU Pulse ‎No edit summary
00:3500:35, 29 April 2013 diff hist +336‎ N Talk:APU Pulse ‎ Created page with "Is the pulse timer simply clocked by CPU/2 ("APU clock") internally? Looks that way in Visual 2A03 (the timer is only 11 bits wide), only I can't get the timer to count down f..."

04:1004:10, 28 April 2013 diff hist +134‎ PPU sprite evaluation ‎ Break out Notes section and add Visual 2C02 link
03:5503:55, 28 April 2013 diff hist +384‎ PPU OAM ‎ Add some more sprite zero internals details

16:2316:23, 26 April 2013 diff hist −126‎ Talk:NTSC video ‎ That's a fair point

13:0213:02, 23 April 2013 diff hist +177‎ Tricky-to-emulate games ‎ Add Marble Madness
00:4300:43, 23 April 2013 diff hist +70‎ Visual 2C02 ‎ '-' is actually a delay

21:2821:28, 22 April 2013 diff hist +56‎ PPU registers ‎ Monochrome bit has no effect on writes to the palette (maybe obvious - confirmed in Visual 2C02)
01:5001:50, 22 April 2013 diff hist −17‎ PPU registers ‎ Clarify that sprite overflow is broken and not merily complex

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