Talk:CPU pinout: Difference between revisions

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==Pin 30==
==Pin 30==
I've managed to trace pin 30 all the way to the enables for $4018-$401A, but pulling the pin high seems to have some other effects on the $4000-$401F read/write enable signals themselves. Exactly what those effects are, I don't know - there's just way too much stuff in there to understand at once. The other effects do seem to go through some sort of delay (a chain of pull-up resistors normally driven low), so perhaps connecting pin 30 to M2 (or even CLK IN) would work to enable these registers. --[[User:Quietust|Quietust]] 15:51, 30 March 2011 (UTC)
The signal from pin 30 goes through the exact same "processing" as the chip's /RESET signal, at which point it goes to the output logic for the M2 pin (don't know exactly what it does) and then through an inverter which goes to the enables for $4018-$401A and to some other spots (seemingly related to the data buffer used for Sprite DMA). Bit 7 of the writable register at $401A seems to propagate to numerous locations within the sound channels and thus might be responsible for the observation of all writable registers disappearing. --[[User:Quietust|Quietust]] 16:49, 29 April 2011 (UTC)

Revision as of 16:49, 29 April 2011

Pin 30

The signal from pin 30 goes through the exact same "processing" as the chip's /RESET signal, at which point it goes to the output logic for the M2 pin (don't know exactly what it does) and then through an inverter which goes to the enables for $4018-$401A and to some other spots (seemingly related to the data buffer used for Sprite DMA). Bit 7 of the writable register at $401A seems to propagate to numerous locations within the sound channels and thus might be responsible for the observation of all writable registers disappearing. --Quietust 16:49, 29 April 2011 (UTC)