Talk:INES Mapper 043: Difference between revisions

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:It's from the original Nintendulator source code. FCEUX implements this mapper somewhat differently, but also checks for a very specific mask. [[User:NewRisingSun|NewRisingSun]] ([[User talk:NewRisingSun|talk]]) 15:01, 20 April 2018 (MDT)
:It's from the original Nintendulator source code. FCEUX implements this mapper somewhat differently, but also checks for a very specific mask. [[User:NewRisingSun|NewRisingSun]] ([[User talk:NewRisingSun|talk]]) 15:01, 20 April 2018 (MDT)
:And it turns out the reason FCEUX implements it differently is that it actually puts yet another SMB2J conversion (Mr. Mary 2) under the same mapper 43, which (of course) uses different hardware than Whirlwind Manu's LF36; for one thing, LF36 uses CHR-ROM, while Mr. Mary 2 uses CHR-RAM. I think I'm going to go nuts trying to document all the different SMB2J conversions. :P [[User:NewRisingSun|NewRisingSun]] ([[User talk:NewRisingSun|talk]]) 15:16, 20 April 2018 (MDT)
:And it turns out the reason FCEUX implements it differently is that it actually puts yet another SMB2J conversion (Mr. Mary 2) under the same mapper 43, which (of course) uses different hardware than Whirlwind Manu's LF36; for one thing, LF36 uses CHR-ROM, while Mr. Mary 2 uses CHR-RAM. I think I'm going to go nuts trying to document all the different SMB2J conversions. :P [[User:NewRisingSun|NewRisingSun]] ([[User talk:NewRisingSun|talk]]) 15:16, 20 April 2018 (MDT)
::Nintendulator explicitly has a range of $4000-$FFFF – <tt>for (int i = 0x4; i < 0x10; i++) EMU->SetCPUWriteHandler(i, Write);</tt> – so A15 is at least somehow involved...
::Given that this sounds like a discrete logic/PAL-based mapper (e.g. the IRQ is pretty clearly a 4040 or 4020), I'm going to bet that the mask is $F122 (or possibly $E122 or $C122), but without at least a photo of the hardware there's no real point in musing any further. —[[User:Lidnariq|Lidnariq]] ([[User talk:Lidnariq|talk]]) 15:22, 20 April 2018 (MDT)

Latest revision as of 21:22, 20 April 2018

Register mask

How confident are you about the masks? Involving 12 bits is a surprisingly large number. And A15 has to be involved—as is, writes to NES internal RAM ($0122, $0322, &c) would control IRQs. —Lidnariq (talk) 12:09, 20 April 2018 (MDT)

It's from the original Nintendulator source code. FCEUX implements this mapper somewhat differently, but also checks for a very specific mask. NewRisingSun (talk) 15:01, 20 April 2018 (MDT)
And it turns out the reason FCEUX implements it differently is that it actually puts yet another SMB2J conversion (Mr. Mary 2) under the same mapper 43, which (of course) uses different hardware than Whirlwind Manu's LF36; for one thing, LF36 uses CHR-ROM, while Mr. Mary 2 uses CHR-RAM. I think I'm going to go nuts trying to document all the different SMB2J conversions. :P NewRisingSun (talk) 15:16, 20 April 2018 (MDT)
Nintendulator explicitly has a range of $4000-$FFFF – for (int i = 0x4; i < 0x10; i++) EMU->SetCPUWriteHandler(i, Write); – so A15 is at least somehow involved...
Given that this sounds like a discrete logic/PAL-based mapper (e.g. the IRQ is pretty clearly a 4040 or 4020), I'm going to bet that the mask is $F122 (or possibly $E122 or $C122), but without at least a photo of the hardware there's no real point in musing any further. —Lidnariq (talk) 15:22, 20 April 2018 (MDT)