Talk:INES Mapper 243

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Revision as of 11:40, 8 December 2019 by NewRisingSun (talk | contribs)
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Solder Pad

What specifies the solder pad? (both in hardware and for an emulator) I don't see a pin on the pinout that could relay it...? —Lidnariq (talk) 14:43, 7 December 2019 (MST)

That only applies to Shogi Gakuen (cartridge code SA-015), mapper 150. Until a PCB image of that particular game is obtained, I cannot answer that question. The solder pad obviously does not exist on the SA-020A PCB, so I have removed its (copy-pasted) description from the mapper 243. NewRisingSun (talk) 16:00, 7 December 2019 (MST)
Take a look at this solder pad on the SA-015 PCB: https://symphoniae.com/nrs/nesdev/SA-015-SolderPad.jpg
It selects whether ASIC pin 14 is connected to CPU D2 or to Vcc. At first, that may seem irrelevant, until you debug Shogi Gakuen's pad-reading code fully (starting at CPU offset $807B). The game first writes $00 to all registers, then writes $FF to register $02, then reads back register $06 and checks if the result is zero. If the solder pad connects ASIC pin 14 to CPU D2, then writing $FF to register $02 will cause register $06 to read back as $00 (actually $40 because D3-D7 are open bus) since it was cleared before. If the solder pad connects Vcc to CPU D2, the writing $FF to register $02 will actually write to register $06 and thus cause it to read back as $FF (or $43, since D3-D7 are always open bus, and D2 is not connected to the ASIC either in that solder pad configuration). I had not noticed this before because I had only looked at the final register $06 read, thinking I had verified it to match what emulators are already doing. Correct would be to state that both the index and all registers are readable, and the solder pad selects whether D2 is connected to the ASIC pin 14 or Vcc is. NewRisingSun (talk) 04:37, 8 December 2019 (MST)

L-shaped mirroring layout

Old documentation said that L-shaped mirroring was OR2(PPU A10,PPU A11) (i.e. top left is unique). In contrast, the current documentation seems to say it's OR2(NOT(PPU A10),PPU A11) (i.e. top right is unique). Is this a typo, my misinterpretation, or a change in documentation? —Lidnariq (talk) 15:53, 7 December 2019 (MST)

I need to check again. NewRisingSun (talk) 16:00, 7 December 2019 (MST)