Talk:RAMBO-1: Difference between revisions

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(→‎Alternate IRQ timing: No need of checking the irq_delay.)
m (Deleted obsoleted IRQ speculation.)
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As for the 2mb PRG, I'm not sure if the cart actually supports that much ROM, but the PRG registers apparently are 8 bits, and 8kb * $100 = 2048kb = 2mb. --[[User:Drag|Drag]] 03:05, 9 November 2011 (UTC)
As for the 2mb PRG, I'm not sure if the cart actually supports that much ROM, but the PRG registers apparently are 8 bits, and 8kb * $100 = 2048kb = 2mb. --[[User:Drag|Drag]] 03:05, 9 November 2011 (UTC)
== IRQ related - Hard Drivin' ==
Suggested changes for the Mapper64 IRQ. It makes Hard Drivin' to work fine. No other games are affected with this change.
Every cycle on 6502 is either a read or a write cycle. So, you update the IRQ counter in the next CPU cycle:
* '''IF''' $C001 was written to after previous clock
** reload IRQ counter with IRQ Reload value '''PLUS ONE'''
* '''ELSE IF''' IRQ counter is 0
** reload IRQ counter with IRQ Reload value
When the IRQ is clocked by the mapper (in scanline or cycle mode):
** Decrement IRQ counter by 1
** '''IF''' IRQ counter is now 0 '''AND''' IRQs are enabled
*** wait one M2 cycle, then trigger IRQ
Hard Drivin' works. --[[User:Zepper|Zepper]] ([[User talk:Zepper|talk]]) 17:57, 14 January 2014 (MST)


== Alternate IRQ timing  ==
== Alternate IRQ timing  ==
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  writes to $E001: irq_enable=true; IRQ acknowledge by CPU.
  writes to $E001: irq_enable=true; IRQ acknowledge by CPU.


When the IRQ is clocked by CPU or scanline modes:
* When the IRQ is clocked by CPU or scanline modes:


  If irq_reload == true:
  If irq_reload == true:
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  If irq_counter == 0 and irq_enable == true
  If irq_counter == 0 and irq_enable == true
     irq_delay=4 (IRQ will be fired 4 CPU cycles later)
     irq_delay=4 (IRQ will be fired 4 CPU cycles later)
--[[User:Zepper|Zepper]] ([[User talk:Zepper|talk]]) 21:16, 6 August 2017 (MDT)

Revision as of 03:16, 7 August 2017

As for the 2mb PRG, I'm not sure if the cart actually supports that much ROM, but the PRG registers apparently are 8 bits, and 8kb * $100 = 2048kb = 2mb. --Drag 03:05, 9 November 2011 (UTC)

Alternate IRQ timing

This is how to get 4 games working: Klax, Skull&Crossbones, Rolling Thunder and Hard Drivin'.

  • Address mask: $E001.
writes to $C000: irq_latch=data;
writes to $C001: irq_reload=true; irq_mode=data&1;
writes to $E000: irq_enable=false; IRQ acknowledge by CPU.
writes to $E001: irq_enable=true; IRQ acknowledge by CPU.
  • When the IRQ is clocked by CPU or scanline modes:
If irq_reload == true:
   irq_counter = irq_latch;
   if(irq_latch != 0) irq_counter |= 1;
   irq_reload=false;
Else if irq_counter == 0:
   irq_counter = irq_latch;
Else
   irq_counter--;
If irq_counter == 0 and irq_enable == true
   irq_delay=4 (IRQ will be fired 4 CPU cycles later)

--Zepper (talk) 21:16, 6 August 2017 (MDT)