Talk:RAMBO-1: Difference between revisions
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m (Deleted obsoleted IRQ speculation.) |
m (→Alternate IRQ timing: Minor update, almost perfect!) |
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| Line 6: | Line 6: | ||
*Address mask: $E001. | *Address mask: $E001. | ||
writes to $C000: irq_latch=data; | writes to $C000: irq_flags|=2; irq_latch=data; | ||
writes to $C001: | writes to $C001: irq_flags|=1; irq_mode=data&1; | ||
writes to $E000: irq_enable=false; IRQ acknowledge by CPU. | writes to $E000: irq_enable=false; IRQ acknowledge by CPU. | ||
writes to $E001: irq_enable=true; IRQ acknowledge by CPU. | writes to $E001: irq_enable=true; IRQ acknowledge by CPU. | ||
| Line 13: | Line 13: | ||
* When the IRQ is clocked by CPU or scanline modes: | * When the IRQ is clocked by CPU or scanline modes: | ||
If | If irq_flags&1: | ||
irq_counter = irq_latch; | irq_counter = irq_latch; | ||
if | if irq_latch != 0 | ||
{ | |||
if irq_flags&2 irq_counter |= 1; | |||
else irq_counter+=1; | |||
} | |||
irq_flags=0; | |||
Else if irq_counter == 0: | Else if irq_counter == 0: | ||
irq_counter = irq_latch; | irq_counter = irq_latch; | ||
| Line 24: | Line 28: | ||
irq_delay=4 (IRQ will be fired 4 CPU cycles later) | irq_delay=4 (IRQ will be fired 4 CPU cycles later) | ||
--[[User:Zepper|Zepper]] ([[User talk:Zepper|talk]]) | --[[User:Zepper|Zepper]] ([[User talk:Zepper|talk]]) 20:12, 7 August 2017 (MDT) | ||
Revision as of 02:12, 8 August 2017
As for the 2mb PRG, I'm not sure if the cart actually supports that much ROM, but the PRG registers apparently are 8 bits, and 8kb * $100 = 2048kb = 2mb. --Drag 03:05, 9 November 2011 (UTC)
Alternate IRQ timing
This is how to get 4 games working: Klax, Skull&Crossbones, Rolling Thunder and Hard Drivin'.
- Address mask: $E001.
writes to $C000: irq_flags|=2; irq_latch=data; writes to $C001: irq_flags|=1; irq_mode=data&1; writes to $E000: irq_enable=false; IRQ acknowledge by CPU. writes to $E001: irq_enable=true; IRQ acknowledge by CPU.
- When the IRQ is clocked by CPU or scanline modes:
If irq_flags&1:
irq_counter = irq_latch;
if irq_latch != 0
{
if irq_flags&2 irq_counter |= 1;
else irq_counter+=1;
}
irq_flags=0;
Else if irq_counter == 0:
irq_counter = irq_latch;
Else
irq_counter--;
If irq_counter == 0 and irq_enable == true
irq_delay=4 (IRQ will be fired 4 CPU cycles later)
