User:Ddribin/PPU Sandbox: Difference between revisions
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| Line 18: | Line 18: | ||
|- | |- | ||
! $2000 | ! $2000 | ||
| | | NMIE || MSE || SSZ || BPT || SPT || VDN || NTA1 || NTA0 | ||
|- | |- | ||
! Read/Write | ! Read/Write | ||
| Line 27: | Line 27: | ||
|} | |} | ||
; Bit 7 - | ; Bit 7 - NMIE<nowiki>:</nowiki> NMI Enable | ||
Setting NMI to one causes an NMI to be generated at the start of the vertical blanking interval | Setting NMI to one causes an NMI to be generated at the start of the vertical blanking interval | ||
; Bit 6 - | ; Bit 6 - MSE<nowiki>:</nowiki> Master/Slave Enable | ||
Has no effect on the NES. | Has no effect on the NES. | ||
| Line 66: | Line 66: | ||
|- | |- | ||
! $2001 | ! $2001 | ||
| INB || ING || INR || | | INB || ING || INR || SRE || BRE || SCD || BCD || GRY | ||
|- | |- | ||
! Read/Write | ! Read/Write | ||
| Line 81: | Line 81: | ||
; Bit 5 - INR<nowiki>:</nowiki> Intensify Reds | ; Bit 5 - INR<nowiki>:</nowiki> Intensify Reds | ||
; Bit 4 - | ; Bit 4 - SRE<nowiki>:</nowiki> Sprite Render Enable | ||
; Bit 3 - | ; Bit 3 - BRE<nowiki>:</nowiki> Background Render Enable | ||
; Bit 2 - | ; Bit 2 - SCD<nowiki>:</nowiki> Sprite Clip Disable | ||
; Bit 1 - | ; Bit 1 - BCD<nowiki>:</nowiki> Background Clip Disable | ||
; Bit 0 - GRY<nowiki>:</nowiki> Grayscale Enable | ; Bit 0 - GRY<nowiki>:</nowiki> Grayscale Enable | ||
| Line 101: | Line 101: | ||
ppumask := $2001 | ppumask := $2001 | ||
ppuctrl_nmie = bit2mask(7) | |||
ppuctrl_mse = bit2mask(6) | |||
ppuctrl_ssz = bit2mask(5) | ppuctrl_ssz = bit2mask(5) | ||
ppuctrl_bpt = bit2mask(4) | ppuctrl_bpt = bit2mask(4) | ||
| Line 118: | Line 118: | ||
ppumask_ing = bit2mask(6) | ppumask_ing = bit2mask(6) | ||
ppumask_inr = bit2mask(5) | ppumask_inr = bit2mask(5) | ||
ppumask_sre = bit2mask(4) | |||
ppumask_bre = bit2mask(3) | |||
ppumask_scd = bit2mask(2) | |||
ppumask_bcd = bit2mask(1) | |||
ppumask_gry = bit2mask(0) | ppumask_gry = bit2mask(0) | ||
</pre> | </pre> | ||
Revision as of 04:07, 26 December 2009
PPU Register Overview
| Address | Register | Function |
|---|---|---|
| $2000 | PPUCTRL | PPU Control Register |
| $2001 | PPUMASK | PPU Mask Register |
| $2002 | PPUSTATUS | PPU Status Register |
PPUCTRL: PPU Control Register
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|
| $2000 | NMIE | MSE | SSZ | BPT | SPT | VDN | NTA1 | NTA0 |
| Read/Write | W | W | W | W | W | W | W | W |
| Initial Value | X | X | X | X | X | X | X | X |
- Bit 7 - NMIE: NMI Enable
Setting NMI to one causes an NMI to be generated at the start of the vertical blanking interval
- Bit 6 - MSE: Master/Slave Enable
Has no effect on the NES.
- Bit 5 - SSZ: Sprite Size
0: 8x8; 1: 8x16
- Bit 4 - BPT: Background Pattern Table
Background pattern table address (0: $0000; 1: $1000)
- Bit 3 - SPT: Sprite Pattern Table
Sprite pattern table address for 8x8 sprites (0: $0000; 1: $1000)
- Bit 2 - VDN: VRAM Increment Down
VRAM address increment per CPU read/write of PPUDATA (0: increment by 1, going across; 1: increment by 32, going down)
- Bits 1, 0 - NTA1 and NTA0: Base Nametable Address
| NTA1 | NTA0 | Base VRAM Address |
|---|---|---|
| 0 | 0 | $2000 (Nametable 0) |
| 0 | 1 | $2400 (Nametable 1) |
| 1 | 0 | $2800 (Nametable 2) |
| 1 | 1 | $2C00 (Nametable 3) |
PPUSTATUS - The PPU Status Register
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|
| $2001 | INB | ING | INR | SRE | BRE | SCD | BCD | GRY |
| Read/Write | W | W | W | W | W | W | W | W |
| Initial Value | X | X | X | X | X | X | X | X |
- Bit 7 - INB: Intensify Blues
- Bit 6 - ING: Intensify Greens
- Bit 5 - INR: Intensify Reds
- Bit 4 - SRE: Sprite Render Enable
- Bit 3 - BRE: Background Render Enable
- Bit 2 - SCD: Sprite Clip Disable
- Bit 1 - BCD: Background Clip Disable
- Bit 0 - GRY: Grayscale Enable
CA65 Definitions
.define bit2mask(bitnum) (1 << bitnum)
.define bits2mask(bits, bitnum) (bits << bitnum)
;; PPU Registers
ppuctrl := $2000
ppumask := $2001
ppuctrl_nmie = bit2mask(7)
ppuctrl_mse = bit2mask(6)
ppuctrl_ssz = bit2mask(5)
ppuctrl_bpt = bit2mask(4)
ppuctrl_spt = bit2mask(3)
ppuctrl_vdn = bit2mask(2)
ppuctrl_nta1 = bit2mask(1)
ppuctrl_nta0 = bit2mask(0)
ppuctrl_nta_2000 = bits2mask(%00, ppuctrl_nta0)
ppuctrl_nta_2400 = bits2mask(%01, ppuctrl_nta0)
ppuctrl_nta_2800 = bits2mask(%10, ppuctrl_nta0)
ppuctrl_nta_2c00 = bits2mask(%11, ppuctrl_nta0)
ppumask_inb = bit2mask(7)
ppumask_ing = bit2mask(6)
ppumask_inr = bit2mask(5)
ppumask_sre = bit2mask(4)
ppumask_bre = bit2mask(3)
ppumask_scd = bit2mask(2)
ppumask_bcd = bit2mask(1)
ppumask_gry = bit2mask(0)
