User:Lidnariq/Discrete Logic Table: Difference between revisions

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<tr><td colspan=2 rowspan=2>GxROM-like</td><td colspan="9" align="center" rowspan="1">8kB CHR bank bits</td></tr>
<tr><td colspan=2 rowspan=2>GxROM-like</td><td colspan="9" align="center" rowspan="1">8kB CHR bank bits</td></tr>
<tr><td>0</td><td>1</td><td>2</td><td>3</td><td>4</td><td>5</td><td>6</td><td>7</td><td>8</td></tr>
<tr><td>0</td><td>1</td><td>2</td><td>3</td><td>4</td><td>5</td><td>6</td><td>7</td><td>8</td></tr>
<tr><td colspan="1" rowspan="9">32kB PRG bank bits</td><td>0</td><td>[[NROM]]</td><td>[[Vs. System]]</td><td>[[CNROM]], [[iNES Mapper 087|87]]</td><td></td><td></td><td></td><td></td><td></td><td>oversize [[CNROM]]</td></tr>
<tr><td colspan="1" rowspan="9">32kB PRG bank bits</td><td>0</td><td>[[NROM]]</td><td>[[Vs. System]]</td><td>[[CNROM]], [[iNES Mapper 087|87]], [[iNES Mapper 101|101]]</td><td></td><td></td><td></td><td></td><td></td><td>oversize [[CNROM]]</td></tr>
<tr><td>1</td><td>[[AxROM|AN1ROM]]¹</td><td></td><td>[[GxROM|MHROM]]</td><td>[[iNES Mapper 079|79]]</td><td></td><td></td><td></td><td></td></tr>
<tr><td>1</td><td>[[AxROM|AN1ROM]]¹</td><td></td><td>[[GxROM|MHROM]]</td><td>[[iNES Mapper 079|79]]</td><td></td><td></td><td></td><td></td></tr>
<tr><td>2</td><td>[[AxROM|ANROM]]¹, [[BNROM]]</td><td></td><td>[[GxROM|GNROM]], [[iNES Mapper 038|38]]</td><td>[[iNES Mapper 086|86]]</td><td>[[iNES Mapper 011|11]], [[iNES Mapper 140|140]]</td><td></td><td>oversize [[iNES Mapper 038|38]]</td></tr>
<tr><td>2</td><td>[[AxROM|ANROM]]¹, [[BNROM]]</td><td></td><td>[[GxROM|GNROM]], [[iNES Mapper 038|38]]</td><td>[[iNES Mapper 086|86]]</td><td>[[iNES Mapper 011|11]], [[iNES Mapper 036|36]], [[iNES Mapper 140|140]]</td><td></td><td>oversize [[iNES Mapper 038|38]]</td></tr>
<tr><td>3</td><td>[[AxROM|AOROM]]¹</td><td></td><td></td><td></td><td></td><td></td></tr>
<tr><td>3</td><td>[[AxROM|AOROM]]¹</td><td></td><td></td><td></td><td></td><td></td></tr>
<tr><td>4</td><td>oversize [[AxROM]]¹</td><td></td><td></td><td></td><td>oversize [[GxROM|GNROM]]</td></tr>
<tr><td>4</td><td>oversize [[AxROM]]¹</td><td></td><td></td><td></td><td>oversize [[GxROM|GNROM]]</td></tr>

Revision as of 18:31, 10 October 2012

It appears that all discrete logic mappers either switch 32kB at a time with no fixed bank ("GxROM-like"), or have a 16kB fixed bank and can switch the other ("UxROM-like"). The tables below illustrate the tradeoffs between CHR, PRG, and banking style.

How on earth do I make these HTML tables look good in wiki markup?

GxROM-like8kB CHR bank bits
012345678
32kB PRG bank bits0NROMVs. SystemCNROM, 87, 101oversize CNROM
1AN1ROM¹MHROM79
2ANROM¹, BNROMGNROM, 388611, 36, 140oversize 38
3AOROM¹
4oversize AxROM¹oversize GNROM
5
6
7
8oversize BNROM
UxROM-like8kB CHR bank bits
0123456
16kB PRG bank bits2168
3UNROM, 9472, 78¹, 89¹, 93, 152¹
4UOROM, 18070, 92
5
6oversize 94
7
8oversize UxROM

† banks CHR-RAM, not CHR-ROM

¹ has mapper-controlled single-screen mirroring.