User:Zzo38/Mapper 768

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Revision as of 00:16, 17 March 2013 by Zzo38 (talk | contribs) (Created page with "I am reserving mapper 768 for my own use. In all cases, the NES 2.0 file is arranged like (some parts may be omitted, depending on the header): * Header * Trainer * PRG ROM *...")
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I am reserving mapper 768 for my own use.

In all cases, the NES 2.0 file is arranged like (some parts may be omitted, depending on the header):

  • Header
  • Trainer
  • PRG ROM
  • CHR ROM
  • INST-ROM
  • PROM
  • 128-byte null-terminated ASCII title
  • Extra data for mapper 768 (depending on submapper number)

Submapper 0

Submapper 1

Extra data is not used. There is expected to be a file with .nes.v extension (otherwise having the same name), which contains a Verilog code for implementing the mapper.

The first sixty I/O ports of the main module of the Verilog code must correspond to the pins 01 to 60 of the 60-pin Famicom cartridge, in that order. This is followed by the pins for the PRG ROM, CHR ROM, non-battery PRG RAM, non-battery CHR RAM, battery PRG RAM, and battery CHR RAM.