User:Zzo38/Mapper I: Difference between revisions

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The following cartridge signals are used: /ROMSEL A12 M2 A0 A2 A4 A5 A11 D0-D7 R/W
The following cartridge signals are used: /ROMSEL A12 M2 A0 A2 A4 A5 A11 D0-D7 R/W
* D0-D7 are wired to inputs of both latches, as well as to RAM and both ROMs.
* R/W is wired to the RAM only.
Other wires:
wire0 = /ROMSEL&A12
wire1 = wire0&M2
wire2 = wire1~&A11
wire3 = wire2~&wire2
Latch1.E = wire1&A4
Latch1.D7:D0 = D7:D0
Latch2.E = wire1&A5
Latch2.D7:D0 = D7:D0
ExROM.D7:D0 = D7:D0
ExROM.A16 = A0
ExROM.A15:A8 = Latch2.Q7:Q0
ExROM.A7:A0 = Latch1.Q7:Q0
ExROM./CS = ExRAM./CS~&wire3
ExRAM.D7:D0 = D7:D0
ExRAM.A15:A8 = Latch2.Q7:Q0
ExRAM.A7:A0 = Latch1.Q7:Q0
ExRAM./CS = wire3~&A2
ExRAM.R/W = R/W
This is untested; I hope it works and that I haven't made a mistake in typing it into the computer.

Revision as of 05:35, 19 September 2014

This is design for trying to simplify (and speed up) Z-code interpreter programs. It can be made with four 74xx series ICs (it is completely untested).

  • PRG ROM size: Main ROM = 16K or 32K; ExROM = 16K, 32K, 64K, or 128K.
  • PRG ROM bank size: Main ROM = not bankswitched; ExROM = 2 bytes if 128K, 1 byte if less than 128K
  • PRG RAM size: 8K, 16K, 32K, or 64K (ExRAM; optionally battery-backed)
  • PRG RAM bank size: 1 byte
  • CHR capacity: 8K ROM, or up to 128K battery-backed RAM
  • CHR bank size: 8K
  • Nametable mirroring: Hardwired
  • Bus conflicts: Yes

Note that in the iNES file, ExROM comes first and is then followed by the main ROM.

Mapper registers

There are two 8-bit registers, the low address register and the high address register.

Low address register is mapped at:

[0..1 .... ...1 ....]

High address register is mapped at:

[0..1 .... ..1. ....]

Writing to any such address writes those registers; reading from the addresses will instead write to the mapper register whatever data happens to be read from that address (possibly a mirror of the Famicom's internal 2K RAM).

Note that if bit4 and bit5 are both set, then both registers will be written.

ExROM is mapped at:

[0..1 1... .... .0.x]

A15-A8 are loaded from the high address register, A7-A0 from the low address register, and A16 is from the "x" above.

ExRAM is mapped at:

[0..1 1... .... .1..]

A15-A8 are loaded from the high address register, A7-A0 from the low address register.

The high four bits of the high address register are also used to select a CHR RAM bank (A16-A13).

Also note that accessing ExROM/ExRAM may also write to mapper registers if bit4/bit5 of the address the CPU is using to access it happen to be set (although race conditions may result if you are not careful).

The R/W signal is not used for mapper registers, except when accessing ExRAM.

Wiring

The following cartridge signals are used: /ROMSEL A12 M2 A0 A2 A4 A5 A11 D0-D7 R/W

  • D0-D7 are wired to inputs of both latches, as well as to RAM and both ROMs.
  • R/W is wired to the RAM only.

Other wires:

wire0 = /ROMSEL&A12
wire1 = wire0&M2
wire2 = wire1~&A11
wire3 = wire2~&wire2
Latch1.E = wire1&A4
Latch1.D7:D0 = D7:D0
Latch2.E = wire1&A5
Latch2.D7:D0 = D7:D0
ExROM.D7:D0 = D7:D0
ExROM.A16 = A0
ExROM.A15:A8 = Latch2.Q7:Q0
ExROM.A7:A0 = Latch1.Q7:Q0
ExROM./CS = ExRAM./CS~&wire3
ExRAM.D7:D0 = D7:D0
ExRAM.A15:A8 = Latch2.Q7:Q0
ExRAM.A7:A0 = Latch1.Q7:Q0
ExRAM./CS = wire3~&A2
ExRAM.R/W = R/W

This is untested; I hope it works and that I haven't made a mistake in typing it into the computer.