User talk:Hamtaro126: Difference between revisions

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:: I'd call this the logical evolution of the TC0350. You've increased it to 8x1 CHR banking instead of 2x2+4x1, moved the control registers, changed it to a scanline instead of cycle-counting IRQ, and increased the amount of memory. Note that 2KiB RAMs aren't really available anymore; if you're going to specify a form with more than 8KiB of flat RAM, you may as well specify ''all'' of it to be and put 16320 bytes of RAM from $4040-$7FFF instead. (Or, keep an eye to implementation, and allocate 512*31 bytes from $4200-$7FFF from an iCE40 FPGA). Also, even thought people thought banking CHR RAM to be odd for Lagrange Point, on the balance it's useful. I wouldn't prohibit it a priori. (Also, is "4k" a typo?) —[[User:Lidnariq|Lidnariq]] ([[User talk:Lidnariq|talk]]) 19:34, 30 June 2013 (MDT)
:: I'd call this the logical evolution of the TC0350. You've increased it to 8x1 CHR banking instead of 2x2+4x1, moved the control registers, changed it to a scanline instead of cycle-counting IRQ, and increased the amount of memory. Note that 2KiB RAMs aren't really available anymore; if you're going to specify a form with more than 8KiB of flat RAM, you may as well specify ''all'' of it to be and put 16320 bytes of RAM from $4040-$7FFF instead. (Or, keep an eye to implementation, and allocate 512*31 bytes from $4200-$7FFF from an iCE40 FPGA). Also, even thought people thought banking CHR RAM to be odd for Lagrange Point, on the balance it's useful. I wouldn't prohibit it a priori. (Also, is "4k" a typo?) —[[User:Lidnariq|Lidnariq]] ([[User talk:Lidnariq|talk]]) 19:34, 30 June 2013 (MDT)
You said you have no intention to build this cartridge, which might be OK, but you should at least have some idea of how to build such a cartridge (using discrete logic, Verilog, whatever). --[[User:Zzo38|Zzo38]] ([[User talk:Zzo38|talk]]) 15:13, 4 July 2013 (MDT)

Revision as of 21:13, 4 July 2013

H126-ROM1 and H126-RAM1 mapper format (for next letter of ZZO38's Mapperset)

This mapper will be a DIY thing, I will not make carts, But it is possible to make them!

Based off a combo of UxROM and MMC3

PPU (H126-ROM1):

  • $0000-$03FF: 4k CHR bank 1 (uses $40C0)
  • $0400-$07FF: 4k CHR bank 2 (uses $40C1)
  • $0800-$0BFF: 4k CHR bank 3 (uses $40C2)
  • $0C00-$0FFF: 4k CHR bank 4 (uses $40C3)
  • $1000-$13FF: 4k CHR bank 5 (uses $40C4)
  • $1400-$17FF: 4k CHR bank 6 (uses $40C5)
  • $1800-$1BFF: 4k CHR bank 7 (uses $40C6)
  • $1C00-$1FFF: 4k CHR bank 8 (uses $40C7)

PPU (H126-RAM1):

  • $0000-$1FFF - 8k CHR RAM ($40C0-$40C7 are unused!)

RAM:

  • $5000-$5FFF: 2k WRAM (optional)
  • $6000-$7FFF: 8k SaveRAM or WRAM

ROM:

  • $8000-$9FFF: 8k ROM bank 1 (uses $40C8)
  • $A000-$BFFF: 8k ROM bank 2 (uses $40C9)
  • $C000-$DFFF: 8k ROM bank 3 (uses $40CA)
  • $E000-$FFFF: 8k ROM bank 4 (Fixed)

PPU Mirror:

  • $40CB: Mirroring (0 = 1-Screen $2000, 1 = 1-Screen $2400, 2 = Horizontal, 3 = Vertical)

IRQ (optional):

  • $40CC: Control Disable
  • $40CD: Control Enable
  • $40CE: Cycle IRQ Counter Value (MMC5 style)

This is a WIP, May Change!!! --Hamtaro126 (talk) 08:10, 29 June 2013 (MDT)

Discussion

I suggest to use $40C8, $40C9, $40CA for the PRG ROM bank select, and having $40CB unused. I think this would be more logical and probably simpler to build. --Zzo38 (talk) 12:10, 29 June 2013 (MDT)

EDIT1: Adjustments are Made, Tell me more, --Hamtaro126 (talk) 23:59, 29 June 2013 (MDT)

This is very similar to Taito's X1-017 or TC0350. —Lidnariq (talk) 13:12, 29 June 2013 (MDT)

NOTE1: I actually based the format off of complex mappers like Sunsoft and Taito's, But wanted the user to choose what options needed for their game, But this mapper is not too complex, It is designed for a variable sized package for cheapness, And the reason that MMC5-style instead of MMC3 IRQs are used because of ease of use! --Hamtaro126 (talk) 08:32, 30 June 2013 (MDT)
I'd call this the logical evolution of the TC0350. You've increased it to 8x1 CHR banking instead of 2x2+4x1, moved the control registers, changed it to a scanline instead of cycle-counting IRQ, and increased the amount of memory. Note that 2KiB RAMs aren't really available anymore; if you're going to specify a form with more than 8KiB of flat RAM, you may as well specify all of it to be and put 16320 bytes of RAM from $4040-$7FFF instead. (Or, keep an eye to implementation, and allocate 512*31 bytes from $4200-$7FFF from an iCE40 FPGA). Also, even thought people thought banking CHR RAM to be odd for Lagrange Point, on the balance it's useful. I wouldn't prohibit it a priori. (Also, is "4k" a typo?) —Lidnariq (talk) 19:34, 30 June 2013 (MDT)

You said you have no intention to build this cartridge, which might be OK, but you should at least have some idea of how to build such a cartridge (using discrete logic, Verilog, whatever). --Zzo38 (talk) 15:13, 4 July 2013 (MDT)