VRC2 pinout: Difference between revisions

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m (Traced out pins 17 and 39)
m (... integrate information in http://nesdev.parodius.com/bbs/viewtopic.php?t=8569)
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The Konami [[VRC2]] and [[VRC4]] chips come in 40-pin DIP packages :
The Konami [[VRC2]] and [[VRC4]] chips come in almost-identical 40-pin DIP packages :




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                     (n) PRG /CE -> |14      27| -> CHR A15 (r)
                     (n) PRG /CE -> |14      27| -> CHR A15 (r)
                         (n) M2 -> |15      26| -> CHR A12 (r)
                         (n) M2 -> |15      26| -> CHR A12 (r)
                            NC - |16      25| -> CHR A14 (r)
              VRC4 (r) CHR A18 <- |16      25| -> CHR A14 (r)
            VRC4 only (n) /IRQ <- |17      24| -> CHR A13 (r)
                  VRC4 (n) /IRQ <- |17      24| -> CHR A13 (r)
                             NC -  |18      23| -> CHR A11 (r)
                             NC -  |18      23| -> CHR A11 (r)
                            NC - |19      22| -> CHR A16 (r)
                  VRC4 WRAM /CE <- |19      22| -> CHR A16 (r)
                             GND -  |20      21| -> CHR A10 (r)
                             GND -  |20      21| -> CHR A10 (r)
                                   `----------'
                                   `----------'
On the VRC2, pins 16-19 seem to have been [http://nesdev.parodius.com/bbs/viewtopic.php?t=8569 intended for a never-seen-used EEPROM]

Revision as of 20:09, 27 April 2012

The Konami VRC2 and VRC4 chips come in almost-identical 40-pin DIP packages :


  • (s) means this pin is shared between rom, system and NES
  • (r) this only connects to the ROM
  • (n) means this pin is connected to the NES only
  • CHR : these connect to the CHR ROM and/or fami's CHR pins
  • PRG : these connect to the PRG ROM and/or fami's PRG pins
                                  .----\/----. 
                   (n) PRG A13 -> |01      40| -  +5V
                   (n) PRG A14 -> |02      39| -> PRG A17 (r)
                   (s) PRG A1  -> |03      38| -> PRG A15 (r)
                   (s) PRG A0  -> |04      37| <- PRG A12 (s)
                   (n) CHR A12 -> |05      36| -> PRG A14 (r)
                   (n) CHR A11 -> |06      35| -> PRG A13 (r)
                   (n) CHR A10 -> |07      34| -> PRG A16 (r)
                   (r) PRG /CE <- |08      33| <- PRG D0 (s)
                   (n) PRG R/W -> |09      32| <- PRG D1 (s)
                   (r) CHR /CE <- |10      31| <- PRG D2 (s)
                   (n) CHR A13 -> |11      30| <- PRG D4 (s)
                   (n) CHR /OE -> |12      29| <- PRG D3 (s)
                   (n) CHR A10 -> |13      28| -> CHR A17 (r)
                   (n) PRG /CE -> |14      27| -> CHR A15 (r)
                        (n) M2 -> |15      26| -> CHR A12 (r)
              VRC4 (r) CHR A18 <- |16      25| -> CHR A14 (r)
                 VRC4 (n) /IRQ <- |17      24| -> CHR A13 (r)
                            NC -  |18      23| -> CHR A11 (r)
                 VRC4 WRAM /CE <- |19      22| -> CHR A16 (r)
                           GND -  |20      21| -> CHR A10 (r)
                                  `----------'

On the VRC2, pins 16-19 seem to have been intended for a never-seen-used EEPROM