VT02+ Registers

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Revision as of 00:20, 14 June 2016 by Freem (talk | contribs) (incomplete dump of register information from "VT03 Data Sheet RevisionA6_ENG.pdf"; only the main program/system registers in the $4xxx area have been dealt with.)
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The VT03 is a famiclone with added capabilities. It uses "OneBus" instead of separate CPU and PPU buses, and supports a 4-bit color mode.

Registers

Program Bank 1, Video Bank 2 ($4100) > write

7  bit  0
---- ----
PPPP VVVV
|||| ||||
|||| ++++- Video Bank 2   (VA24, VA23, VA22, VA21)
++++------ Program Bank 1 (PA24, PA23, PA22, PA21)

Timer Interrupt Preload Times ($4101) > write

When TSYNEN is 0, this register sets "the number of AD12 switching high low". When TSYNEN is 1, this register sets "the number of HSYNC switching high low" instead. (See $410B.)

Load Timer Interrupt Value ($4102) > write

Writing any value to this register will set the timer's value and start counting.

Timer Interrupt Disable ($4103) > write

Writing any value to this register will disable the timer interrupt.

Timer Interrupt Enable ($4104) > write

Writing any value to this register will enable the timer interrupt.

V Bank 0 decode type, P Bank 0 decode type, Inter Char VRAM ($4105) > write

7  bit  0
---- ----
VPIx xxxx
|||| ||||
|||+-++++- unused
||+------- Internal VRAM as CHR RAM (0: disabled; 1: enabled)
|+-------- Program Bank 0 Decoding (see below table)
+--------- Video Bank 0 Decoding (see below table)

Program Bank 0 Decoding

PQ2EN ($410B) COMR6 A[14:13] (CPU) TPA20 TPA19 TPA18 TPA17 TPA16 TPA15 TPA14 TPA13
0 0 PQ07 PQ06 PQ05 PQ04 PQ03 PQ02 PQ01 PQ00
0 1 PQ17 PQ16 PQ15 PQ14 PQ13 PQ12 PQ11 PQ10
0 2 1 1 1 1 1 1 1 0
0 3 1 1 1 1 1 1 1 1
0 4 1 1 1 1 1 1 1 0
0 5 PQ17 PQ16 PQ15 PQ14 PQ13 PQ12 PQ11 PQ10
0 6 PQ07 PQ06 PQ05 PQ04 PQ03 PQ02 PQ01 PQ00
0 7 1 1 1 1 1 1 1 1
1 0 PQ07 PQ06 PQ05 PQ04 PQ03 PQ02 PQ01 PQ00
1 1 PQ17 PQ16 PQ15 PQ14 PQ13 PQ12 PQ11 PQ10
1 2 PQ27 PQ26 PQ25 PQ24 PQ23 PQ22 PQ21 PQ20
1 3 1 1 1 1 1 1 1 1
1 4 PQ27 PQ26 PQ25 PQ24 PQ23 PQ22 PQ21 PQ20
1 5 PQ17 PQ16 PQ15 PQ14 PQ13 PQ12 PQ11 PQ10
1 6 PQ07 PQ06 PQ05 PQ04 PQ03 PQ02 PQ01 PQ00
1 7 1 1 1 1 1 1 1 1

Video Bank 0 Decoding

COMR7 AD[12:10] TVA17 TVA16 TVA15 TVA14 TVA13 TVA12 TVA11 TVA10
0,1,C,D RV47 RV46 RV45 RV44 RV43 RV42 RV41 AD10
0 2,3,E,F RV57 RV56 RV55 RV54 RV53 RV52 RV51 AD10
0 4,8 RV07 RV06 RV05 RV04 RV03 RV02 RV01 RV00
0 5,9 RV17 RV16 RV15 RV14 RV13 RV12 RV11 RV10
0 6,A RV27 RV26 RV25 RV24 RV23 RV22 RV21 RV20
0 7,B RV37 RV36 RV35 RV34 RV33 RV32 RV31 RV30

Horizontal/Vertical Scrolling Selector ($4106) > write

7  bit  0
---- ----
VPIx xxxx
|||| ||||
|||| |||+- H/V scrolling selector (0: Horizontal; 1: Vertical)
++++-+++-- unused

Program Bank 0 Register 0 ($4107) > write

7  bit  0
---- ----
PPPP PPPP
|||| ||||
|||| |||+- PQ00
|||| ||+-- PQ01
|||| |+--- PQ02
|||| +---- PQ03
|||+------ PQ04
||+------- PQ05
|+-------- PQ06
+--------- PQ07

Program Bank 0 Register 1 ($4108) > write

7  bit  0
---- ----
PPPP PPPP
|||| ||||
|||| |||+- PQ10
|||| ||+-- PQ11
|||| |+--- PQ12
|||| +---- PQ13
|||+------ PQ14
||+------- PQ15
|+-------- PQ16
+--------- PQ17

Program Bank 0 Register 2 ($4109) > write

7  bit  0
---- ----
PPPP PPPP
|||| ||||
|||| |||+- PQ20
|||| ||+-- PQ21
|||| |+--- PQ22
|||| +---- PQ23
|||+------ PQ24
||+------- PQ25
|+-------- PQ26
+--------- PQ27

Program Bank 0 Register 3 ($410A) > write

7  bit  0
---- ----
PPPP PPPP
|||| ||||
|||| |||+- PQ30
|||| ||+-- PQ31
|||| |+--- PQ32
|||| +---- PQ33
|||+------ PQ34
||+------- PQ35
|+-------- PQ36
+--------- PQ37

Timer interrupt clock selector, Program Bank 0 register 2 enable/disable, RS232 enable/disable, Bus output normal/tristate, Program Bank 0 selector ($410B) > write

7  bit  0
---- ----
TpRB XPPP
|||| ||||
|||| |+++- Program Bank 0 Selector
|||| +---- XRWB switch (0: Writes to $6000-$FFFF will not activate XRWB; 1: writes to $6000-$FFFF will activate XRWB)
|||+------ Bus output control (0: Normal bus output; 1: Tri-state bus)
||+------- RS232 (0: disabled; 1: enabled)
|+-------- Program Bank 0 Register 2 enable (0: disabled; 1: enabled)
+--------- Timer interrupt clock select (0: AD12; 1: HSYNC)

I/O Port Control ($410D) > write

7  bit  0
---- ----
DdCc BbAa
|||| ||||
|||| |||+- I/O port 0 mode (0: input; 1: output)
|||| ||+-- I/O port 0 enable (0: disabled; 1:enabled)
|||| |+--- I/O port 1 mode (0: input; 1: output)
|||| +---- I/O port 1 enable (0: disabled; 1:enabled)
|||+------ I/O port 2 mode (0: input; 1: output)
||+------- I/O port 2 enable (0: disabled; 1:enabled)
|+-------- I/O port 3 mode (0: input; 1: output)
+--------- I/O port 3 enable (0: disabled; 1:enabled)
  • Bits d0-d3 must be set to $A if using flash memory in 16-bit mode.
  • External SRAM is not available if using flash memory in 16-bit mode.

I/O Port Output Data, Ports 0 and 1 ($410E) <> read/write

7  bit  0
---- ----
DDDD dddd
|||| ||||
|||| ++++- I/O port 0 data (XVD3, XVD2, XVD1, XVD0)
++++------ I/O port 1 data (XVD7, XVD6, XVD5, XVD4)

I/O Port Output Data, Ports 2 and 3 ($410F) <> read/write

7  bit  0
---- ----
DDDD dddd
|||| ||||
|||| ++++- I/O port 2 data (XAD12, XAD11, XAD10, XRA10)
++++------ I/O port 3 data (XVRW, VXOEB, XRCB, XRC)

RS232 Timer

"In PAL system, CK21M is 26.601712MHz, in NTSC system is 21.47727MHz. RS232T=#4115,#4114 data. Baud rate will be CK21M/((RS232T+2)*2). For example, In PAL system, the baud rate 9600, RS232T=0567."

RS232 Timer Low Byte ($4114) > write

Write the low byte of the RS232 timer.

RS232 Timer High Byte ($4115) > write

Write the high byte of the RS232 timer.

RS232 Register ($4119) > write

7  bit  0
---- ----
xxBx xxxT
|||| ||||
|||| |||+- TX bit 8
|||+-+++-- unused
||+------- Bit 8 enable (0: 10 bits mode including start, end bits, and bit 7-0 data; 1: 11 bits mode including start, end bits, bit 8 and bit7-0 data)
++-------- unused

RS232 Flags ($4119) < read

7  bit  0
---- ----
rsTV VxER
|||| ||||
|||| |||+- RX bit 8
|||| ||+-- RERRF (If 1, receiving error occurred)
|||| |+--- unused
|||+-+---- Output pins: TV system selector (XF5OR6 (50/60Hz?), XPORN (PAL/NTSC?))
||+------- RINGF (If 1, currently receiving data)
|+-------- TIFLAG (If 1, completed sending data)
+--------- RIFLAG (If 1, completed receiving data)

RS232 TX data ($411A) > write

Write RS232 data (bits 7-0).

RS232 RX data ($411B) < read

Read RS232 data (bits 7-0).

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