TLSROM: Difference between revisions
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[[Category:Nintendo licensed mappers]] | [[Category:Nintendo licensed mappers]][[Category:Mappers with scanline IRQs]] | ||
'''TLSROM''' refers to a variant of the [[TLROM]] board with the VRAM mirroring signals routed through the CHR side of the [[MMC3|Nintendo MMC3]] a different way, as described in [[iNES Mapper 118]]. | '''TLSROM''' refers to a variant of the [[TLROM]] board with the VRAM mirroring signals routed through the CHR side of the [[MMC3|Nintendo MMC3]] a different way, as described in [[iNES Mapper 118]]. | ||
Revision as of 17:12, 18 May 2015
TLSROM refers to a variant of the TLROM board with the VRAM mirroring signals routed through the CHR side of the Nintendo MMC3 a different way, as described in iNES Mapper 118.
Overview
- PRG ROM size: 128, 256 or 512 KB (DIP-28/32 Nintendo pinout)
- PRG ROM bank size: 8 KB
- PRG RAM: None
- CHR capacity: 128 KB ROM (DIP-32 Nintendo pinout)
- CHR bank size: 1 KB and 2 KB
- Nametable mirroring: Controlled by mapper, but in a non-standard way (see Mapper 118).
- Subject to bus conflicts: No
