Action 53 mapper
This is a sketch of a mapper that allows making a multicart of games that use multiple discrete mappers. As a random sample, it'd support 1943: The Battle of Midway/Valhalla (UNROM), 3-D Battles of Worldrunner (UNROM), Battle City (NROM-128), Battle Kid: Fortress of Peril (UOROM), Battle Tank (CNROM), Battleship (CNROM), Battletoads (AOROM), and Gekitotsu Yonku Battle (UNROM).
Registers
- $5000-$5FFF
- Register select
- $8000-$FFFF
- Register value
$5000: Register select
7654 3210 S R | +- Select register +--------- 0: User registers; 1: Supervisor registers
In a multicart, registers $00 and $01 change the bank within a game, and registers $80 and $81 remain constant throughout a given game's execution.
$00: CHR bank
7654 3210 M BB | ++- Set CHR RAM A14-A13 +------ Set CIRAM A10 if H/V mirroring is disabled
$01: Inner bank
7654 3210 M BBBB | ++++- Set current PRG ROM bank +------ Set CIRAM A10 if H/V mirroring is disabled
$80: Mode
7654 3210 SS PPMM || ||++- Nametable mirroring mode || ++--- PRG bank mode ++------ PRG outer bank size
Mode | Effect |
---|---|
0 | 1-screen lower bank |
1 | 1-screen upper bank |
2 | Vertical (and ignore writes to bit 4 of registers $00 and $01) |
3 | Horizontal (and ignore writes to bit 4 of registers $00 and $01) |
Mode | Effect |
---|---|
0, 1 | Current 32 KiB bank in $8000-$FFFF |
2 | Bottom half of outer bank in $8000-$BFFF and current bank in $C000-$FFFF |
3 | Current bank in $8000-$BFFF and top half of outer bank in $C000-$FFFF |
Mode | Effect |
---|---|
0 | A20-A15 controlled by outer bank (32 KiB) |
1 | A20-A16 controlled by outer bank (64 KiB) |
2 | A20-A17 controlled by outer bank (128 KiB) |
3 | A20-A18 controlled by outer bank (256 KiB) |
Here are some examples of how bank modes work, assuming the outer bank is set to $12 and inner bank is $07:
Mode value | PRG bank mode | Outer bank size | Bank in $8000-$BFFF | Bank in $C000-$FFFF |
---|---|---|---|---|
$00-$07 | 32 KiB | 32 KiB | $12 bottom | $12 top |
$08-$0B | Fixed $8000 | 32 KiB | $12 bottom | $12 top |
$0C-$0F | Fixed $C000 | 32 KiB | $12 top | $12 top |
$10-$17 | 32 KiB | 64 KiB | $13 bottom | $13 top |
$18-$1B | Fixed $8000 | 64 KiB | $12 bottom | |
$1C-$1F | Fixed $C000 | 64 KiB | $12 top | |
$20-$27 | 32 KiB | 128 KiB | $13 bottom | $13 top |
$28-$2B | Fixed $8000 | 128 KiB | $12 bottom | |
$2C-$2F | Fixed $C000 | 128 KiB | $12 top | |
$30-$37 | 32 KiB | 256 KiB | $17 bottom | $17 top |
$38-$3B | Fixed $8000 | 256 KiB | $12 bottom | |
$3C-$3F | Fixed $C000 | 256 KiB | $12 top
$81: Outer bank7654 3210 BB BBBB ++-++++- Set outer PRG ROM bank Configurations
Implementation notesA CPLD requires at least one macrocell per bit of state, plus more macrocells for more complex operations. This mapper requires 20 bits of state, which leaves plenty of breathing room in a 36-cell CPLD for mapper logic.
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