CPU: Difference between revisions

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(→‎Note: that title isn't the best)
(→‎Section: This is illegal, you know)
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* [[CPU_power_up_state|Power up state]]
* [[CPU_power_up_state|Power up state]]
* [[CPU_status_flag_behavior|status flag behavior]]
* [[CPU_status_flag_behavior|status flag behavior]]
* [[CPU unofficial opcodes|Unofficial opcodes]]


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Revision as of 21:25, 27 July 2010

The NES CPU core is based on the 6502 processor and runs at approximately 1.79 MHz (1.66 MHz in a PAL NES). It is made by Ricoh and lacks the MOS6502's decimal mode. In the NTSC NES, the RP2A03 chip contains the CPU and APU; in the PAL NES, the CPU and APU are contained within the RP2A07 chip.


Section


Note

The CPU generates its clock signal by dividing the master clock signal.

Rate NTSC NES/Famicom PAL NES PAL Famiclone
Color subcarrier frequency fsc (exact) 39375000/11 Hz 4433618.75 Hz 4433618.75 Hz
Color subcarrier frequency fsc (approx.) 3.579545 MHz 4.433619 MHz 4.433619 MHz
Master clock frequency 6fsc 21.477272 MHz 26.601712 MHz 26.601712 MHz
Clock divisor d 12 16 15
CPU clock frequency 6fsc/d 1.789773 MHz 1.662607 MHz 1.773448 MHz
  • Kevtris has confirmed that all illegal 6502 opcodes execute identically on the 2A03/2A07. He has even went as far as to integrate them into the CopyNES BIOS.
  • The CPU pinout is located in the hardware pinout section here
  • For the CPU instruction list, see 6502 instructions.
  • A printer friendly version covering all section is available here.