INES Mapper 119: Difference between revisions

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(imported info from the TQROM page, which is ready for deletion)
(link back to TxROM to finish merge from TQROM)
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[[iNES Mapper 119]] is used to designate the TQROM board, which uses the [[Nintendo MMC3]] in such a way so as to allow both CHR ROM and CHR RAM to be used simultaneously.
[[iNES Mapper 119]] is used to designate the TQROM board, which uses the [[Nintendo MMC3]] like other [[TxROM]] boards but uses the CHR bank number in such a way so as to allow both CHR ROM and CHR RAM to be used simultaneously.


== Registers ==
== Registers ==
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== References ==
== References ==
*[http://kevtris.org/mappers/mmc3/NES_TQROM.html NES-TQROM] by Kevin Horton
*[http://kevtris.org/mappers/mmc3/NES_TQROM.html NES-TQROM] by Kevin Horton


[[Category:iNES Mappers]]
[[Category:iNES Mappers]]

Revision as of 04:51, 15 November 2010

iNES Mapper 119 is used to designate the TQROM board, which uses the Nintendo MMC3 like other TxROM boards but uses the CHR bank number in such a way so as to allow both CHR ROM and CHR RAM to be used simultaneously.

Registers

See MMC3

Bank data ($8001-$9FFF, odd)

Bit 6 of the CHR bank number is used to switch between the CHR ROM chip and the CHR RAM chip.

7  bit  0
---- ----
xCDD DDDD
 ||| ||||
 |++-++++- New bank value, based on last value written to Bank select register
 |         0: Select 2 KB CHR bank at PPU $0000-$07FF (or $1000-$17FF);
 |         1: Select 2 KB CHR bank at PPU $0800-$0FFF (or $1800-$1FFF);
 |         2: Select 1 KB CHR bank at PPU $1000-$13FF (or $0000-$03FF);
 |         3: Select 1 KB CHR bank at PPU $1400-$17FF (or $0400-$07FF);
 |         4: Select 1 KB CHR bank at PPU $1800-$1BFF (or $0800-$0BFF);
 |         5: Select 1 KB CHR bank at PPU $1C00-$1FFF (or $0C00-$0FFF);
 |         6, 7: As standard MMC3
 +-------- Chip select (for CHR banks)
           0: Select CHR ROM; 1: Select CHR RAM

Nintendo could have used bit 7 instead of bit 6, allowing 128 KiB of CHR ROM instead of 64 KiB. However, using bit 7 would have precluded a hypothetical "TQSROM" board combining TQROM-style ROM/RAM mixing with TLSROM-style single-screen mirroring. Rare developed both games on this board, and Rare was also a big fan of single-screen mirroring on the AxROM boards.

Hardware

A 74HC32 IC controls the CHR RAM's enable line.

References