INES Mapper 163: Difference between revisions

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(summarize conjecture about internals)
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Registers: (Address is masked with 0x7300)
Registers: (Address is masked with 0x7300)
*5200 = [....xxxx] xxxx = High nibble of 32k PRG page
*5200 = [....xxxx] xxxx = High nibble of 32k PRG page
*5000 = [c...xxxx] xxxx = Low nibble of 32k PRG page.  If the most significant bit of this register is set, it does automatic CHR RAM switching at scanline 128.  The exact way this works is unknown.
*5000 = [c...xxxx] xxxx = Low nibble of 32k PRG page.  If the most significant bit of this register is set, it does automatic CHR RAM switching at scanline 128.  The exact way this works is unknown but is conjectured to resemble [[iNES Mapper 096]], latching PA9 at start of nametable reads.
**When turned on, both 4K CHR RAM banks 0000-0FFF and 1000-1FFF map to 0000-0FFF for scanline 240 until scanline 128.  Then at scanline 128, both 4K CHR banks point to 1000-1FFF.
**When turned on, both 4K CHR RAM banks 0000-0FFF and 1000-1FFF map to 0000-0FFF for scanline 240 until scanline 128.  Then at scanline 128, both 4K CHR banks point to 1000-1FFF.
*5100 = When set to 6, sets the 32K PRG bank to 3.  Further writes to 5200 or 5000 change the bank back to normal.
*5100 = When set to 6, sets the 32K PRG bank to 3.  Further writes to 5200 or 5000 change the bank back to normal.

Revision as of 14:09, 1 October 2018

Mapper used by Nanjing for their games. Mostly unlicensed ports of games on newer systems, of varying quality. Games using this mapper include Final Fantasy VII and Pokemon Yellow.

This is similar to INES_Mapper_164

Details from FCEUX source code:

Memory map:

  • 5000-5FFF = Registers and copy protection
  • 6000-7FFF = PRG RAM (battery backed)
  • 8000-FFFF = PRG ROM (switchable in 32k banks)

Registers: (Address is masked with 0x7300)

  • 5200 = [....xxxx] xxxx = High nibble of 32k PRG page
  • 5000 = [c...xxxx] xxxx = Low nibble of 32k PRG page. If the most significant bit of this register is set, it does automatic CHR RAM switching at scanline 128. The exact way this works is unknown but is conjectured to resemble iNES Mapper 096, latching PA9 at start of nametable reads.
    • When turned on, both 4K CHR RAM banks 0000-0FFF and 1000-1FFF map to 0000-0FFF for scanline 240 until scanline 128. Then at scanline 128, both 4K CHR banks point to 1000-1FFF.
  • 5100 = When set to 6, sets the 32K PRG bank to 3. Further writes to 5200 or 5000 change the bank back to normal.

Copy protection: (Address is masked with 0x7300, except for 5101)

  • 5300 = Value of security register
  • 5101 = If the value of this register is changed from nonzero to zero, "trigger" is toggled (XORed with 1). Initial value of this register is 1, initial value of "trigger" is 0.

Reading: (Address is masked with 0x7700)

  • 5100 = Returns value of 5300
  • 5500 = If "trigger" is 1, returns value of 5300, otherwise returns 0