NES 2.0 submappers: Difference between revisions

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(formatting VRC2/VRC4 for consitency with the rest of the article, reorganizing information and trying to fully describe the intent/purpose of the submappers)
(→‎VRC2 / VRC4: VRC2 assignment is underspecified here, is "15" supposed to denote VRC2?)
Line 174: Line 174:
+---- 0: Use next lower address line for VRC4a A2; 1: use next higher line
+---- 0: Use next lower address line for VRC4a A2; 1: use next higher line
</pre>
</pre>
The values 0 (A0 and next lower) and 15 (A7 and next higher) are impossible.
The values 0 (A0 and next lower) and 15 (A7 and next higher) are impossible. 15 is used to indicate VRC2 for the two mappers that it shares with VRC4.


The [[VRC4]] article describes the ports by mapping them to the variant called "VRC4a" on that page, which uses A2 and A1, putting the four [[VRC IRQ]] ports (IRQ Latch low, IRQ Latch high, IRQ Control, and IRQ Acknowledge) at $F000, $F002, $F004, and $F006.
The [[VRC4]] article describes the ports by mapping them to the variant called "VRC4a" on that page, which uses A2 and A1, putting the four [[VRC IRQ]] ports (IRQ Latch low, IRQ Latch high, IRQ Control, and IRQ Acknowledge) at $F000, $F002, $F004, and $F006.
Line 192: Line 192:
| VRC4f || A1 || A0 || $x000, $x001, $x002, $x003 || 23 || 8
| VRC4f || A1 || A0 || $x000, $x001, $x002, $x003 || 23 || 8
|}
|}
There are three variations of the [[VRC2]] boards:
{| class="tabular"
! Nickname || A2 || A1 || Registers || iNES mapper || NES 2.0 submapper
|-
| VRC2a* || A1 || A0 || $x000, $x002, $x001, $x003 || [[iNES Mapper 022|22]] || 0
|-
| VRC2b || A0 || A1 || $x000, $x001, $x002, $x003 || 23 || 15
|-
| VRC2c || A1 || A0 || $x000, $x002, $x001, $x003 || 25 || 15
|}
: * Note that VRC2a is exclusively assigned to [[iNES Mapper 022|mapper 22]], because it has an CHR bank select implementation that is incompatible with the others.


=== 023: 8 VRC4f ===
=== 023: 8 VRC4f ===

Revision as of 20:07, 9 August 2015

Submapper is a term used in the NES 2.0 header for 4-bit codes designating functionally distinct variants of iNES mappers that cannot be distinguished by the memory size fields alone. Most emulators using iNES format distinguish these using CRC, SHA-1, or other hashes of the PRG ROM and CHR ROM, but this works only for games published prior to 1997, not for fan translations or ROM hacks, and not for new games on the same mapper.

Submapper 0 represents the default iNES behavour, so that backward compatibility is maintained.

Submapper allocations that are listed as "deprecated" were assigned by kevtris' original proposal, but have no known use cases. The deprecation reserves these unused allocations to maintain continuity and compatibility.

This document is a living specification. Proposals for new submappers should be made at: Proposals.

001: MMC1

Most MMC1 boards are compatible with the standard mapper 1 behavior (submapper 0).

Boards with CHR-RAM usually reuse the CHR banking lines to address other things.

  • SUROM, SOROM, and SXROM implement extra PRG-ROM and PRG-RAM banking (submappers 1, 2, 4).
  • SNROM implements a redundant PRG-RAM enable (no assigned submapper).

Boards with 32k of PRG-ROM usually have no PRG banking. SEROM, SHROM, SH1ROM (submapper 5).

001: 0

Normal behavior.

001: 1 SUROM

SUROM reuses a CHR banking line to address a larger PRG ROM.

This is a subset of submapper 4 (SXROM).

This should be used with:

  • CHR RAM = 8k
  • PRG RAM = 8k
  • PRG ROM = 512k

Games:

  • Dragon Warrior III
  • Dragon Warrior IV / Dragon Quest IV
  • Ninjara Hoi!

001: 2 SOROM

SOROM reuses a CHR banking line to bankswitch a larger PRG RAM.

This is a subset of submapper 4 (SXROM).

This should be used with:

  • CHR RAM = 8k
  • PRG RAM = 16k
  • PRG ROM <= 256k

Games:

  • Genghis Khan / Aoki Ookami to Shiroki Mejika: Genghis Khan
  • Nobunaga's Ambition / Nobunaga no Yabou: Zenkokuban
  • Romance of the Three Kingdoms
  • Sangokushi

001: 3

Deprecated.

This originally described a submapper that was already implemented as iNES Mapper 155.

001: 4 SXROM

SXROM is a superset of SUROM and SOROM with an additional bit for more PRG RAM.

The MMC1's CHR banking registers are reused in the following way: 

4bit0
-----
PSSxC
||| |
||| +- 4k CHR-RAM bank (CHR A12)
||+--- 16k PRG-RAM bank (PRG RAM A14) SXROM
|+---- 8k PRG-RAM bank (PRG RAM A13) SXROM, SUROM
+----- 256k PRG-RAM bank (PRG ROM A18) SXROM, SOROM

This should be used with:

  • CHR RAM = 8k
  • PRG RAM <= 32k
  • PRG ROM <= 512k

Configurations that only require the SOROM or SUROM subsets should specify those submappers instead.

Games:

001: 5 Fixed PRG

SEROM, SHROM, SH1ROM use a fixed 32k PRG ROM with no banking support. (This is distinct from SIROM which has 32k of bankable PRG ROM.)

PRG ROM A14 is connected directly to CPU A14 (and MMC1 A14 input) instead of MMC1 A14 output.

  • Adventures of Lolo
  • Airwolf
  • The All New Family Feud
  • Anticipation
  • Boulder Dash
  • Dr. Mario
  • Hirake! Ponkikki
  • Palamedes
  • Palamedes II: Star Twinkles
  • R.C. Pro-Am
  • Sesame Street 123
  • Sesame Street ABC
  • Sky Kid
  • Snake Rattle 'n Roll
  • Taboo: The Sixth Sense
  • Tetris

Some of these games may be compatible with submapper 0 if $8000-BFFF is initialized to the low bank, and $C000-FFFF is initialized to the high bank, and the game never changes this.

004: MMC3

iNES Mapper 004 represents the most common boards using these four ICs: early MMC3, late MMC3, MC-ACC, and MMC6.

There are three known kinds of IRQ:

  1. MMC3A: IRQ is asserted on A12 rise, and loading the latch with 0 disables IRQ. Some chips labeled MMC3B also have this "old style" behavior. No games are known to rely on this behavior.
  2. MMC3C: IRQ is asserted on A12 rise, and loading the latch with 0 produces an IRQ on every scanline. Some chips labeled MMC3B also have this "new style" behavior, as does the MMC6. Some later games rely on this behavior.
  3. MC-ACC: IRQ is asserted on A12 fall, typically four pixels later than MMC3C. Interrupts can be produced every scanline, like the MMC3C.[1]

There are two known kinds of PRG RAM enable:

  1. MMC3: One set of enable bits controls the entire chip.
  2. MMC6: The first and second enables control the first and second half of PRG RAM, and an additional enable in bit 5 of $8000 controls the whole PRG RAM.

The TEROM and TFROM boards have two jumpers that can respectively disable IRQs and force hard-wired mirroring. It is believed that nothing was ever released that used them.

004: 0

Normal. (MMC3C)

004: 1 MMC6

MMC6 has an alternative PRG-RAM enable and write protection scheme designed for its internal 1k PRG RAM.

  • StarTropics
  • StarTropics 2

004: 2

Deprecated.

This originally described MMC3C with hard wired mirroring. No games are known to require this.

004: 3 MC-ACC

MC-ACC

The MC-ACC is found in 13 second-source PCBs manufactured by Acclaim:

  • Alien³
  • George Foreman's KO Boxing
  • The Incredible Crash Dummies
  • Mickey's Safari in Letterland
  • Roger Clemens' MVP Baseball
  • Rollerblade Racer
  • The Simpsons: Bart vs. The World
  • The Simpsons: Bartman Meets Radioactive Man
  • Spider-Man: Return of the Sinister Six
  • T&C Surf Designs 2: Thrilla's Surfari
  • T2: Terminator 2: Judgment Day
  • WWF King of the Ring
  • WWF WrestleMania: Steel Cage Challenge


021, 023, 025: VRC2 / VRC4

These three mappers collect various configurations of VRC2 and VRC4 boards.

VRC2 is mostly a subset of VRC4, with differences including:

  • VRC2 has a single bit of memory mapped at $6000-6FFF that the VRC4 does not[2], though it is redundant if WRAM is used.
  • VRC4 has an interrupt device that VRC2 does not.

Additionally, different boards connect the address lines for the registers in various arrangements. The three iNES mappers 21, 23, and 25 each combine multiple boards whose addresses overlap. This is enough for game compatibility, but it creates an ugly combination that does not accurately describe the original hardware of either board.

Submapper assignment

Konami's VRC4 mapper has five known variations (and one additional pirate variation) of how the board connects low CPU address lines among A7-A0 to the port select lines of the mapper. These are spread across three mappers: two for 21, two for 25, and one for 23. There are theoretically 8 * 7 = 56 ways to wire these, but in all five extant possibilities, two adjacent address lines are used: A2 and A1, A0 and A1, A7 and A6, A2 and A3, and A3 and A2. All 14 ways to pick two subsequent integers easily fit in a submapper number: 

3210
||||
|+++- Which address line corresponds is wired to the A1 in the VRC4a
+---- 0: Use next lower address line for VRC4a A2; 1: use next higher line

The values 0 (A0 and next lower) and 15 (A7 and next higher) are impossible. 15 is used to indicate VRC2 for the two mappers that it shares with VRC4.

The VRC4 article describes the ports by mapping them to the variant called "VRC4a" on that page, which uses A2 and A1, putting the four VRC IRQ ports (IRQ Latch low, IRQ Latch high, IRQ Control, and IRQ Acknowledge) at $F000, $F002, $F004, and $F006.

Nickname A2 A1 Registers iNES mapper NES 2.0 submapper
VRC4a A2 A1 $x000, $x002, $x004, $x006 21 9
VRC4b A0 A1 $x000, $x002, $x001, $x003 25 1
VRC4c A7 A6 $x000, $x040, $x080, $x0C0 21 14
VRC4d A2 A3 $x000, $x008, $x004, $x00C 25 3
VRC4e A3 A2 $x000, $x004, $x008, $x00C 23 10
VRC4f A1 A0 $x000, $x001, $x002, $x003 23 8

There are three variations of the VRC2 boards:

Nickname A2 A1 Registers iNES mapper NES 2.0 submapper
VRC2a* A1 A0 $x000, $x002, $x001, $x003 22 0
VRC2b A0 A1 $x000, $x001, $x002, $x003 23 15
VRC2c A1 A0 $x000, $x002, $x001, $x003 25 15
* Note that VRC2a is exclusively assigned to mapper 22, because it has an CHR bank select implementation that is incompatible with the others.

023: 8 VRC4f

Some second-source VRC4 clones used a memory layout that was identical to the VRC2b (the simplest contiguous in-order interpretation: 0,1,2,3).

  • World Hero

023: 15 VRC2b

Some games rely on a single bit of memory mapped in the region from $6000-$6FFF on VRC2. These games were previously supported with submapper 0 by implementing WRAM in this region (despite these games not having WRAM). Additionally, VRC2 does not implement VRC4's interrupts.

025: 15 VRC2c

There is one game that uses VRC2c. It is compatible with submapper 0, but VRC4 has an additional interrupt capability (unused by this game).

032: Irem G101

A variation of this mapper requires hardwired one-screen mirroring and entirely ignores writes to $9000.

032: 0

Normal (H/V mapper-controlled mirroring)

032: 1 Major League

CIRAM A10 is tied high (fixed one-screen mirroring) and PRG banking style is fixed as 8+8+16F

068: Sunsoft 4

In addition to its normal function, the Sunsoft 4 IC was used in Nantettatte!! Baseball, which allowed a second expansion cartridge to be plugged into it.

068: 0

0: Normal (max 256KiB PRG)

068: 1 Dual Cartridge System

1: Sunsoft Dual Cartridge System a.k.a. NTB-ROM (max 128KiB PRG, licensing IC present, external option ROM of up to 128KiB should be selectable by a second menu)

071: Codemasters

Some games use this with 1-screen mirroring, where the mapper's mirroring control bit is wired directly to CIRAM A10. Others have hardwired horizontal or vertical mirroring.

Another variation of this mapper was used in the Quattro multicarts, but these have been reassigned to mapper 232.

071: 0

Hardwired horizontal or vertical mirroring.

071: 1 Fire Hawk

Mapper controlled single-screen mirroring.

078: Cosmo Carrier / Holy Diver

This mapper unfortunately combines two games with incompatible mirroring control.

One game uses this with 1-screen mirroring, where the mapper's mirroring control bit is wired directly to CIRAM A10. The other can switch between horizontal and vertical mirroring, using a multiplexer between PPU A10 and PPU A11 whose output is sent to CIRAM A10.

078: 0

Unspecified.

078: 1 Cosmo Carrier

Single-screen mirroring (nibble-swapped mapper 152).

078: 2

Deprecated.

This described a variation with fixed vertical mirroring, and WRAM. There is no known use case.

078: 3 Holy Diver

Mapper-controlled H/V mirroring.

210: Namco 175 and 340

Mapper 210 doesn't distinguish between the 175's hardwired mirroring and 340's 1/H/V mirroring.

Also, previous confusion and compatibility code used by Namco when they were developing games means that many 175- and 340- using games are incorrectly tagged as mapper 19.

210: 0

No advisory statement is made (use runtime heuristics suggested at mapper 210)

210: 1 N175

Namco 175. Hardwired mirroring, no IRQ.

  • Famista '91
  • Family Circuit '91
  • Chibi Maruko-chan: Uki Uki Shopping
  • Heisei Tensai Bakabon / Genius Bakabon

210: 2 N340

Namco 340. 1/H/V mirroring, no IRQ, no internal or external RAM.

  • Splatterhouse
  • Wagyan Land 2
  • Famista '92
  • Dream Master
  • Top Striker
  • Wagyan Land 3
  • Famista '93
  • Famista '94

232: Quattro

Similar to #71 above, with a separate register controlling which 64 KiB outer bank of the PRG ROM is used. This is used for the Quattro multicarts.

The Aladdin Deck Enhancer version of these multicarts used a different banking scheme.

323: 0

0: Normal

232: 1 Aladdin Deck Enhancer

Aladdin Deck Enhancer variation. Swap the bits of the outer bank number.

References

  1. ↑ MC-ACC IRQ test results
  2. ↑ http://forums.nesdev.org/viewtopic.php?t=8274 VRC2 memory bit at $6000-$6FFF
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