NES 2.0 submappers/Proposals

This page collects proposals for NES 2.0 submappers that are not yet ready for implementation.

1. Explain what game or ROM is incompatible with existing submappers.
2. Explain how the proposed submapper should be implemented.
3. Allow one or more other members of the community to independently verify that both 1 and 2 are correct. (We'll perform peer review, commentary, and possible revision/iteration here.)
4. Allocate and document the new submapper, listing the relevant game/ROM.

When allocating new submappers, please consult kevtris' original proposal before choosing a number. If it is something he already assigned that we have just not adopted yet, use his existing assignment: submappers.txt

If there is no existing game or ROM that requires a submapper, it should not yet be allocated. There is no end to possible variations of hardware, and there is no need to speculate on the future. If you want to work on a project that will require a new mapper, engage the community and/or seek help from others. Do not pre-emptively add a new mapper to the spec until there is something we can run with it. The spec will still be here when you're finished your project.

001: MMC1

submapper 5 is fully specified, allocation is pending the existence of a test ROM

001: 5 Fixed PRG

SEROM, SHROM, SH1ROM use a fixed 32k PRG ROM with no banking support. (This is distinct from SIROM which has 32k of bankable PRG ROM.)

PRG ROM A14 is connected directly to CPU A14 (and MMC1 A14 input) instead of MMC1 A14 output.

Existing games are compatible with submapper 0 if $8000-BFFF is initialized to the low bank, and $C000-FFFF is initialized to the high bank. These boards were used in several games: SEROM SHROM SH1ROM

Test ROM:

• please create a test ROM before allocating this submapper

021, 023, 025: VRC2 / VRC4

these submappers are fully specified, allocation is pending the existence of test ROMs

additional review and consensus for the allocation numbering scheme is requested

These three mappers collect various configurations of VRC2 and VRC4 boards.

VRC2 is mostly a subset of VRC4, with differences including:

• VRC2 has a single bit of memory mapped at $6000-6FFF that the VRC4 does not, though it is redundant if WRAM is used.
• VRC4 has an interrupt device that VRC2 does not.

Additionally, different boards connect the address lines for the registers in various arrangements. The three iNES mappers 21, 23, and 25 each combine multiple boards whose addresses overlap. This is enough for game compatibility, but it creates an ugly combination that does not accurately describe the original hardware of either board.

Submapper assignment

Konami's VRC4 mapper has five known variations (and one additional pirate variation) of how the board connects low CPU address lines among A7-A0 to the port select lines of the mapper. These are spread across three mappers: two for 21, two for 25, and one for 23. There are theoretically 8 * 7 = 56 ways to wire these, but in all five extant possibilities, two adjacent address lines are used: A2 and A1, A0 and A1, A7 and A6, A2 and A3, and A3 and A2. All 14 ways to pick two subsequent integers easily fit in a submapper number:

3210
||||
|+++- Which address line corresponds is wired to the A1 in the VRC4a
+---- 0: Use next lower address line for VRC4a A2; 1: use next higher line

The values 0 (A0 and next lower) and 15 (A7 and next higher) are impossible. 15 is used to indicate VRC2 for the two mappers that it shares with VRC4.

The VRC4 article describes the ports by mapping them to the variant called "VRC4a" on that page, which uses A2 and A1, putting the four VRC IRQ ports (IRQ Latch low, IRQ Latch high, IRQ Control, and IRQ Acknowledge) at $F000, $F002, $F004, and $F006.

Nickname	A2	A1	Registers	iNES mapper	NES 2.0 submapper
VRC4a	A2	A1	$x000, $x002, $x004, $x006	21	9
VRC4b	A0	A1	$x000, $x002, $x001, $x003	25	1
VRC4c	A7	A6	$x000, $x040, $x080, $x0C0	21	14
VRC4d	A2	A3	$x000, $x008, $x004, $x00C	25	3
VRC4e	A3	A2	$x000, $x004, $x008, $x00C	23	10
VRC4f	A1	A0	$x000, $x001, $x002, $x003	23	8

There are three variations of the VRC2 boards:

Nickname	A2	A1	Registers	iNES mapper	NES 2.0 submapper
VRC2a*	A1	A0	$x000, $x002, $x001, $x003	22	0
VRC2b	A0	A1	$x000, $x001, $x002, $x003	23	15
VRC2c	A1	A0	$x000, $x002, $x001, $x003	25	15

* Note that VRC2a is exclusively assigned to mapper 22, because it has an CHR bank select implementation that is incompatible with the others.

Alternative Submapper Assignment

Each of the 3 mappers represents only 2 addressing schemes. Any new addressing schemes are not backward compatible with iNES anyway so don't need their own submapper numbers. A newly discovered board would be a new mapper, not a submapper. There's no need to make space for future boards, the only potential variants for existing boards is VRC2 vs VRC4.

I would instead propose:

• 021: 1 VRC4a (A2, A1)
• 021: 2 VRC4c (A7, A6)
• 021: 3 unseen VRC2 (A2, A1)
• 021: 4 unseen VRC2 (A7, A6)
• 023: 1 VRC4f (A1, A0)
• 023: 2 VRC4e (A3, A2)
• 023: 3 VRC2b (A1, A0)
• 023: 4 unseen VRC2 (A3, A2)
• 025: 1 VRC4b (A0, A1)
• 025: 2 VRC4d (A2, A3)
• 025: 3 VRC2c (A0, A1)
• 025: 4 unseen VRC2 (A2, A3)

This covers all known variants, and any potential undiscovered VRC2 variants that could fit the existing iNES mappers.

021 / 023 / 025: 0

The default implementation acts as a VRC4 (mostly compatible superset of VRC2), and responds to register writes in one or more configurations simultaneously (supporting both boards at once).

021 / 023 / 025: 1, 3, 8, 9, 10, 14 VRC4

These allocations each request a single specific addressing scheme for VRC4, rather than the combined version used by submapper 0.

Test ROMs:

• 021: 9 VRC4a - please create a test ROM before allocating this submapper
• 025: 1 VRC4b - please create a test ROM before allocating this submapper
• 021: 14 VRC4c - please create a test ROM before allocating this submapper
• 025: 3 VRC4d - please create a test ROM before allocating this submapper
• 023: 10 VRC4e - please create a test ROM before allocating this submapper
• 023: 8 VRC4f - please create a test ROM before allocating this submapper

023: 8 VRC4f

Some second-source VRC4 clones used a memory layout that was identical to the VRC2b (the simplest contiguous in-order interpretation: 0,1,2,3). This was used in World Hero.

Test ROM:

• please create a test ROM before allocating this submapper

023: 15 VRC2b

Some games rely on a single bit of memory mapped in the region from $6000-$6FFF on VRC2. These games were previously supported with submapper 0 by implementing WRAM in this region (despite these games not having WRAM). Additionally, VRC2 does not implement VRC4's interrupts. This board was used in Contra (J) and Ganbare Goemon 2.

Test ROM:

• please create a test ROM before allocating this submapper

025: 15 VRC2c

Ganbare Goemon Gaiden: Keita Ougon Kiseru uses VRC2c. It is compatible with submapper 0, but VRC4 has an additional interrupt capability (unused by this game).

Test ROM:

• please create a test ROM before allocating this submapper

005: MMC5

Status: Wishlist

Vertical split mode:
0: SL (all known hardware)
1: CL

If only one kind (battery or non-battery) of PRG-RAM present:
0: PRG-RAM is contiguous (EKROM, EWROM)
2: PRG-RAM is not contiguous; is split in half across two chips

If both kinds of PRG-RAM present:
0: Chip 0 is battery-backed (ETROM (note: verify this))
2: Chip 1 is battery-backed

Pulse waves volume:
0: R1 is 6.8kΩ (as in all games that use expansion audio)
4: R1 is 15kΩ (the nominal value of this resistor)

It is safe to leave the submapper number at 0 for all known games.

002, 003, 007: UxROM, CNROM, AxROM

Status: Draft

AxROM (mapper 7) is the only known licensed discrete logic mapper to unreliably come with bus conflict prevention circuitry. While no game documented in NesCartDB was released in one region on multiple board variants, several games did change boards when localized.

The following table is tentatively offered-
0: Normal (No advisory statement is made as to whether this game has bus conflicts) (uninvestigated AOROM)
1: Bus conflicts do not occur (ANROM)
2: Bus conflicts occur (AMROM)

Although all Nintendo-manufactured games using normal CNROM (mapper 3), normal UxROM (mapper 2), and inverted UxROM (mapper 180) had bus conflicts, apparently several unlicensed games require their absence, as does the updated version of Donkey Kong with the pie factory level.[1] This same table should be used for them, too.

CNROM with security diodes (mapper 185) has a different set of submapper definitions.

019: Namco 129 and 163

Status: Problem outline

Mapper 19 designates the Namco 129 and 163, which supports expansion sound, IRQs, and ROM nametables.

Different 163-using PCBs used a different resistor to change the volume of the expansion audio relative to the internal 2A03 audio. It is unclear if this variation warrants a submapper.

KH allocated a submapper specifically for the N163-using game Mindseeker. It is not known what is different about this game.

Tentative suggestion:
Mapper 19:
1: N163, expansion audio unused (mixing resistor: 0Ω)
2: N163, mixing resistor: 4.7kΩ
3: N163, mixing resistor: 10kΩ
4: N163, mixing resistor: 15kΩ
9: N129. Expansion audio is known buggy relative to N163, but other differences are not known.

Source: KH's submappers

034: BNROM / NINA-001

This iNES mapper unfortunately combines the unrelated BNROM and NINA-001 mappers.

034: 0

Normal.

Both mappers can be implemented simultaneously without incompatibility with existing games.

Alternatively, because the NINA-001 supports CHR banking and BNROM does not, the presence of more than 8 KiB of CHR implies NINA-001, and could be used to select between two exclusive mapper implementations.

034: 1

NINA-001 only.

034: 2

"Union Bond" (more information needed, can be deprecated until then)

034: 3

BNROM only, subject to bus conflicts.

iNES Mapper 185

Status: Draft

A few NROM-like games were released on CNROM boards where all four bits of the latch were solely used as an anti-piracy measure. While a documented heuristic exists for which values were used, we tentatively suggest that the submapper here indicate the value to be written to the latch for normal operation (submapper = (latch&0x30)/4+(latch&3))

3210  
||||
|||+- Bit 0 (bank number)
||+-- Bit 1 (bank number)
|+--- Bit 4 (diode config)
+---- Bit 5 (diode config)

In the case that any of the bits are "don't care", use 0.

---

On second thought, lidnariq would be happier with

3210
xxCC
||||
|||+- Bit 0 (bank number)
||+-- Bit 1 (bank number)
++--- Always "01", so that submapper 0 (use heuristic) doesn't collide with "write 0 for correct operation"