NROM-368

NROM-368 is a name for an extension to all mappers incapable of banking PRG, such as discrete logic mappers 0 (NROM), 3 (CNROM), 13 (CPROM), 99 (Vs. System), and 184 (Sunsoft 1), allowing 46 KiB of linearly addressed ROM instead of 32 KiB. The name comes from the naming scheme for Nintendo's NROM boards, as 368 kilobits of PRG ROM are addressable. Its original intent was to provide more space for a game written in C, as cc65 tends not to be good at optimizing for space.

Format

The PRG ROM is 49152 bytes in size. The first 2048 bytes are ignored; the rest is loaded into $4800-$7FFF, $8000-$BFFF, and $C000-$FFFF.

So an iNES or NES 2.0 image would look like this:

1. 16 bytes: Header. PRG ROM size must be 3. Trainer and battery are forbidden; NES 2.0 PRG RAM size must be 0.
2. 2048 bytes: Ignored.
3. 47104 bytes: PRG ROM mapped to $4800-$FFFF.
4. 8192*n bytes: CHR ROM mapped to PPU $0000-$1FFF.

Hardware

Just as the addition of PRG RAM and bus conflict avoidance to these mappers takes one chip to decode, the addition of $4800-$7FFF also takes one chip that uses PRG /CE, M2, and A14-A11 to construct an enable signal for the PRG ROM. This is a 74HC85 comparator.

TO DO: Once the circuit is tested on a real PCB, details of how to wire up the '85 will be given here.

A14 through A0 go to the PRG ROM as is, and PRG /CE goes to A15. When burning the EPROM, you have to rearrange the 16 KiB segments of the PRG ROM into the order 1, 2, 0, 0, as PRG /CE is inverted compared to A15.

References

• BBS topic