Namco 163: Difference between revisions

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m (→‎Overview: CHR ROM + CHR RAM category is a superset and more accurate to what it is)
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* PRG ROM bank size: 8 KB
* PRG ROM bank size: 8 KB
* PRG RAM: Up to 8 KB
* PRG RAM: Up to 8 KB
* CHR capacity: Up to 256 KB ROM (and/or 32 KB RAM simultaneously?) [[Category:Mappers with CHR RAM]]
* CHR capacity: Up to 256 KB ROM, or 224 KB ROM with the 2 KB internal nametable as CHR-RAM (mapper 19 only). [[Category:Mappers with CHR ROM and CHR RAM]]
* CHR bank size: 1 KB
* CHR bank size: 1 KB
* Nametable [[mirroring]]: Controlled by mapper (Mapper 19), hardwired (Mapper 210)
* Nametable [[mirroring]]: Controlled by mapper (mapper 19), hardwired (mapper 210)
* Subject to [[bus conflict]]s: No
* Subject to [[bus conflict]]s: No
Mapper 19 can use the internal nametable memory as CHR-RAM.[[Category:Mappers with CHR ROM and CHR RAM]]


== Banks ==
== Banks ==

Revision as of 21:05, 21 April 2015

The Namco 129 and 163 with expansion sound are assigned to iNES Mapper 19, while simpler variants using the Namco 175 and 340 ICs have simpler mirroring and are assigned to iNES Mapper 210. All four were packaged in 48-pin TQFPs.

Many older programs incorrectly identify this mapper by the name Namco 106. Some sources use the name Namcot instead of Namco, as some games and PCBs use this variation on the company name.

Example games:

  • Digital Devil Story - Megami Tensei 2
  • Final Lap
  • Rolling Thunder (J)
  • Splatter House
  • Mappy Kids

Overview

  • PRG ROM size: Up to 512 KB
  • PRG ROM bank size: 8 KB
  • PRG RAM: Up to 8 KB
  • CHR capacity: Up to 256 KB ROM, or 224 KB ROM with the 2 KB internal nametable as CHR-RAM (mapper 19 only).
  • CHR bank size: 1 KB
  • Nametable mirroring: Controlled by mapper (mapper 19), hardwired (mapper 210)
  • Subject to bus conflicts: No

Banks

  • CPU $6000-$7FFF: 8 KB PRG RAM bank
  • CPU $8000-$9FFF: 8 KB switchable PRG ROM bank
  • CPU $A000-$BFFF: 8 KB switchable PRG ROM bank
  • CPU $C000-$DFFF: 8 KB switchable PRG ROM bank
  • CPU $E000-$FFFF: 8 KB PRG ROM bank, fixed to the last bank
  • PPU $0000-$03FF: 1 KB switchable CHR bank
  • PPU $0400-$07FF: 1 KB switchable CHR bank
  • PPU $0800-$0BFF: 1 KB switchable CHR bank
  • PPU $0C00-$0FFF: 1 KB switchable CHR bank
  • PPU $1000-$13FF: 1 KB switchable CHR bank
  • PPU $1400-$17FF: 1 KB switchable CHR bank
  • PPU $1800-$1BFF: 1 KB switchable CHR bank
  • PPU $1C00-$1FFF: 1 KB switchable CHR bank
  • PPU $2000-$23FF: 1 KB switchable CHR bank
  • PPU $2400-$27FF: 1 KB switchable CHR bank
  • PPU $2800-$2BFF: 1 KB switchable CHR bank
  • PPU $2C00-$2FFF: 1 KB switchable CHR bank

Registers

The 163 has 19 registers within $4800-$5FFF and $8000-$FFFF, while the the 175 and 340 only have 12. Each register occupies a range of $800 bytes, so $4800-$4FFF all refers to one register, $5000-$57FF all refers to another register, and so on.

Sound Data Port ($4800-$4FFF) r/w (Namco 129,163 only)

See Namco 163 audio.

IRQ Counter (low) ($5000-$57FF) r/w (Namco 129,163 only)

7  bit  0
---- ----
IIII IIII
|||| ||||
++++-++++- Low 8 bits of IRQ counter

IRQ Counter (high) / IRQ Enable ($5800-$5FFF) r/w (Namco 129,163 only)

7  bit  0
---- ----
EIII IIII
|||| ||||
|+++-++++- High 7 bits of IRQ counter
+--------- IRQ Enable: (0: disabled; 1: enabled)

CHR and NT Select ($8000-$DFFF) w

Value CPU writes Behavior
$00-$DF Always selects 1KB page of CHR-ROM
$E0-$FF If enabled by bit in $E800 and using a N163 or N129, use the NES's internal nametables (even values for A, odd values for B)
Write to CPU address 1KB CHR bank affected Values ≥ $E0 denote NES NTRAM if
$8000-$87FF $0000-$03FF $E800.6 = 0
$8800-$8FFF $0400-$07FF $E800.6 = 0
$9000-$97FF $0800-$0BFF $E800.6 = 0
$9800-$9FFF $0C00-$0FFF $E800.6 = 0
$A000-$A7FF $1000-$13FF $E800.7 = 0
$A800-$AFFF $1400-$17FF $E800.7 = 0
$B000-$B7FF $1800-$1BFF $E800.7 = 0
$B800-$BFFF $1C00-$1FFF $E800.7 = 0
$C000-$C7FF $2000-$23FF always
$C800-$CFFF $2400-$27FF always
$D000-$D7FF $2800-$2BFF always
$D800-$DFFF $2C00-$2FFF always

Note: With mapper 210, a.k.a. Namco 175 or 340, the nametable selection registers have no effect, and nametable RAM cannot be used as CHR-RAM.

It is believed, but untested, that a game could add a normal SRAM and use it instead of the nametable RAM; if so, a game would be able to get 4-screen mirroring and many more pages of CHR-RAM.

External PRG RAM enable ($C000-$C7FF) w (Namco 175 only)

7  bit  0
---- ----
.... ...E
        |
        +- 1: Enable PRG RAM

PRG Select 1 ($E000-$E7FF) w

7  bit  0
---- ----
MMPP PPPP
|||| ||||
||++-++++- Select 8KB page of PRG-ROM at $8000
|+-------- Namco 129, 163 only: Disable sound if set
++-------- Namco 340 only: Select mirroring
             0: One-screen A
             1: Vertical
             2: Horizontal
             3: One-screen B

PRG Select 2 / CHR-RAM Enable ($E800-$EFFF) w

7  bit  0
---- ----
HLPP PPPP
|||| ||||
||++-++++- Select 8KB page of PRG-ROM at $A000
|+-------- Disable CHR-RAM at $0000-$0FFF (Namco 129, 163 only)
|            0: Pages $E0-$FF use NT RAM as CHR-RAM
|            1: Pages $E0-$FF are the last $20 banks of CHR-ROM
+--------- Disable CHR-RAM at $1000-$1FFF (Namco 129, 163 only)
             0: Pages $E0-$FF use NT RAM as CHR-RAM
             1: Pages $E0-$FF are the last $20 banks of CHR-ROM

PRG Select 3 ($F000-$F7FF) w

7  bit  0
---- ----
..PP PPPP
  || ||||
  ++-++++- Select 8KB page of PRG-ROM at $C000

Write Protect for External RAM AND Sound Address Port ($F800-$FFFF) w (Namco 129, 163 only)

7  bit  0
---- ----
KKKK DCBA
|||| ||||
|||| |||+- 1: Write-protect 2kB window of external RAM from $6000-$67FF (0: write enable)
|||| ||+-- 1: Write-protect 2kB window of external RAM from $6800-$6FFF (0: write enable)
|||| |+--- 1: Write-protect 2kB window of external RAM from $7000-$77FF (0: write enable)
|||| +---- 1: Write-protect 2kB window of external RAM from $7800-$7FFF (0: write enable)
++++------ Additionally the upper nybble must be equal to b0100 to enable writes

Any value outside of the range $40-$4E will cause all PRG RAM to be read-only.

Also see Namco 163 audio.

IRQ Operation

The IRQ is a 15-bit CPU cycle up-counter. $5000 and $5800 provide direct access to the counter itself (i.e., this isn't a reload value). Games can read and write to these registers in realtime.

The IRQ counter increments on each CPU cycle. Upon reaching $7FFF, an IRQ is fired, and it stops counting. Writing to $5000 or $5800 will acknowledge any pending IRQs.

See also

All of the below are in Japanese: