SUROM: Difference between revisions

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'''SUROM''' (NES-SUROM and HVC-SUROM) is one of the less common boards within the [[SxROM]] subset. Like other SxROM boards, SUROM uses the [[MMC1|Nintendo MMC1]] ASIC, but because it always uses CHR RAM, it uses a spare CHR address line to control a PRG address bit, letting the program switch entire 256 KB banks (including the normally "fixed" bank). The normal PRG and control bits control only switching within a 256 KB bank.
#REDIRECT [[SxROM]]
 
== Overview ==
* PRG ROM size: 512 KB (DIP-32 Nintendo pinout)
* PRG ROM bank size: 16 KB or 32 KB (inner); 256 KB (outer)
* PRG RAM: 8 KB + battery
* CHR capacity: 8 KB RAM
* CHR bank size: 8 KB or 4 KB
* Nametable [[mirroring]]: Controlled by mapper
* Subject to [[bus conflict]]s: No
 
== Banks ==
Some modes of the MMC1 use a fixed PRG bank. However, in SUROM, the fixed bank is the first or last 16 KB of the currently selected 256 KB outer bank.
 
== Solder pad config ==
* PRG RAM retaining data : 'SL' disconnected, Battery, D1, D2 and R2 present.
* PRG RAM not retaining data : 'SL' connected, leave slots for Battery, D1, D2 and R2 free.
 
== Registers ==
The behavior of this board differs from that of a typical MMC1 board in the use of the upper CHR address line:
=== CHR bank 0 (internal, $A000-$BFFF) ===
4bit0
-----
PxxxC
|  |
|  +- Select 4 KB CHR RAM bank at PPU $0000 (ignored in 8 KB mode)
+----- Select 256 KB PRG bank
 
=== CHR bank 1 (internal, $C000-$DFFF) ===
4bit0
-----
PxxxC
|  |
|  +- Select 4 KB CHR RAM bank at PPU $1000 (ignored in 8 KB mode)
+----- Select 256 KB PRG bank (ignored in 8 KB mode)
 
Note: In 4KB CHR bank mode, the <code>P</code> bits in both CHR bank registers must be set to the same value, or the PRG ROM will be bankswitched as the PPU renders, in a similar fashion as [[MMC3#Hardware|MMC3]]'s scanline counter. As there is not much of a reason to use 4 KB bankswitching with CHR RAM, it is wise for programs to just set 8 KB bankswitching mode in the [[MMC1#Control (internal, $8000-$9FFF)|Control register]].
 
== Variants ==
In theory, wiring up more CHR bank bits to PRG address lines would allow a cart to use up to 4096 KB of PRG ROM, or possibly 1024 to 2048 KB of PRG ROM with a larger CHR RAM.
But because of mask ROM prices during the NES's commercial life, no official game did this, not even ''Dragon Warrior''.
Any 1 MB dumps of ''Dragon Warrior III'' or ''Dragon Warrior IV'' floating around are overdumps created before SUROM was fully understood.

Latest revision as of 04:33, 15 November 2010

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