User contributions for Ben Boldt
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30 April 2024
- 23:4523:45, 30 April 2024 diff hist +270 m Famicom Network System "card" -> "tsuushin card", "NES" -> "Famicom". Added external links. current
22 April 2024
- 23:3823:38, 22 April 2024 diff hist +240 Talk:Family Computer Disk System →FDS current
2 April 2024
- 14:4814:48, 2 April 2024 diff hist +220 MMC5 →Scanline IRQ Status ($5204, read/write): Clarified that the scanline does not reset from a scanline interrupt. current
- 07:3907:39, 2 April 2024 diff hist +198 MMC5 →Scanline Detection and Scanline IRQ: updated a couple things having to do with scanline counter resetting.
- 07:2507:25, 2 April 2024 diff hist +353 MMC5 →PPU Data Substitution Enable ($2001 = PPUMASK): Added info about scanline counter.
30 March 2024
- 04:2804:28, 30 March 2024 diff hist +251 MMC5 →Internal extended RAM mode ($5104): Improved connection between PPU address and CPU address for extended RAM data.
29 March 2024
- 13:0513:05, 29 March 2024 diff hist +7 m MMC5 →Vertical Split Mode ($5200)
- 12:5912:59, 29 March 2024 diff hist +849 MMC5 →Vertical Split Mode ($5200): Improved description, fixed problems where I was saying that the MMC5 substitutes pattern data.
27 March 2024
- 03:4503:45, 27 March 2024 diff hist +89 m MMC5 →MMC5A
- 03:3703:37, 27 March 2024 diff hist +429 MMC5 →MMC5A Registers: Corrected errors related to register $5207.
- 00:3200:32, 27 March 2024 diff hist +7 m MMC5 →Nametable mapping ($5105)
- 00:1900:19, 27 March 2024 diff hist +759 MMC5 →Internal extended RAM mode ($5104): Updated description detailing what happens when assigning ExRAM as nametable when extended attributes are enabled.
26 March 2024
- 21:5821:58, 26 March 2024 diff hist +71 MMC5 →Scanline IRQ Status ($5204, read/write): Pin 92 low disables scanline IRQs.
- 21:5421:54, 26 March 2024 diff hist +355 MMC5 →8x16 PPU Sequence Monitoring Enable ($2001 = PPUMASK)
- 21:3521:35, 26 March 2024 diff hist +319 MMC5 →NES internal state monitoring: Corresponding update to description of $2001. I need to check if scanline IRQs get disabled this way as well.
- 21:2421:24, 26 March 2024 diff hist +135 MMC5 →Internal extended RAM mode ($5104): Added PPUMASK info for extended attribute mode.
- 21:2121:21, 26 March 2024 diff hist +101 MMC5 →Vertical Split Mode ($5200): I found that vertical split mode is disabled by PPUMASK monitoring, similar as 8x16 sprite mode.
- 02:2002:20, 26 March 2024 diff hist +115 MMC5 →Vertical Split Mode ($5200): More details, things that automatically disable split mode.
- 02:1402:14, 26 March 2024 diff hist +40 MMC5 →Vertical Split Mode ($5200): Pin 92 low disables split mode.
- 01:5301:53, 26 March 2024 diff hist +9 m MMC5 →Internal extended RAM mode ($5104)
- 01:5301:53, 26 March 2024 diff hist +346 MMC5 →Internal extended RAM mode ($5104): I must have goofed something up before because I absolutely am not getting nametable data to work in mode %11. Tested and added split mode info.
25 March 2024
- 22:1122:11, 25 March 2024 diff hist +474 m MMC5 →Vertical Split Mode ($5200): Additional cleanup.
- 21:0521:05, 25 March 2024 diff hist +411 MMC5 →Vertical Split Mode ($5200): Clarifications as I am reading and remembering how this works. No new information in this edit.
- 19:5419:54, 25 March 2024 diff hist +130 MMC5 →Fill-mode color ($5107): Fill mode color vs. pin 92 low when using extended attributes with fill mode.
- 19:4619:46, 25 March 2024 diff hist −278 MMC5 →Configuration: removed incorrect statements that were caused by a test setup issue. My test waited for in-frame before doing these writes, so the test itself got disabled with pin 92 low.
- 19:1219:12, 25 March 2024 diff hist +13 MMC5 →Internal extended RAM mode ($5104): additional note clarifying that extended ram writes via ppudata does not become available when pin 92 is driven low. I.e. pin 92 low is not just pretending to be in a different mode.
- 19:0619:06, 25 March 2024 diff hist +84 MMC5 →Internal extended RAM mode ($5104): pin 92 low prevents write access to $5C00
- 08:3508:35, 25 March 2024 diff hist +320 MMC5 →Fill-mode color ($5107): added more fill mode info.
- 04:1804:18, 25 March 2024 diff hist −4 m Talk:MMC5 →List of Mysteries: Pin 92 is known now.
- 03:2403:24, 25 March 2024 diff hist +201 MMC5 →Internal extended RAM mode ($5104): Writing during v-blank in modes 00,01 is not writing zeros for me. It either doesn’t write or it corrupts it.
- 02:2002:20, 25 March 2024 diff hist +41 MMC5 →Nametable mapping ($5105)
- 02:1502:15, 25 March 2024 diff hist 0 m MMC5 →Internal extended RAM mode ($5104)
- 02:1202:12, 25 March 2024 diff hist +466 MMC5 →Internal extended RAM mode ($5104): Details added for $5104 register. Testing revealed that mode 11 does work as a read-only nametable.
- 01:3601:36, 25 March 2024 diff hist +64 MMC5 →Scanline IRQ Status ($5204, read/write): pin 92 info
- 01:3301:33, 25 March 2024 diff hist +12 MMC5 pinout I found that driving pin 92 low makes the MMC5 think it is always out of frame. current
24 March 2024
- 21:1421:14, 24 March 2024 diff hist +137 MMC5 →Scanline IRQ Status ($5204, read/write): In-frame bit clarification. I think we knew this already but I did test to confirm the h-blank. I did a test program that reads $5204, ROL*3, write to $4016, then watched OUT0 with a scope.
16 January 2024
- 12:1612:16, 16 January 2024 diff hist +412 PPU attribute tables Added expansion section
31 December 2023
- 03:1603:16, 31 December 2023 diff hist 0 m MMC5 →PRG Bankswitching ($5113-$5117): Made example select ROM since 10 was larger than possible for RAM.
30 December 2023
- 00:3900:39, 30 December 2023 diff hist +6,269 MMC5 →PRG Bankswitching ($5113-$5117): Bankswitch register clarification. No new info; just trying to explain it better.
27 October 2022
- 03:4203:42, 27 October 2022 diff hist −254 m MMC5 →Scanline Detection and Scanline IRQ: Removed the last paragraph about reset detection, which was already explained farther up.
27 August 2022
- 16:3816:38, 27 August 2022 diff hist +22 m Famicom Network System →Data Bus Behavior: Added note, Kanji ROM /CE pin.
11 August 2022
- 17:5517:55, 11 August 2022 diff hist +607 Famicom Network System Removed unnecessary "1=" from yes/no table cell style templates. Added unknown/unconfirmed register $40A0 (placeholder).
9 August 2022
- 21:2121:21, 9 August 2022 diff hist −2 m MMC5 →Internal extended RAM mode ($5104): Removed unnecessary "1=" from table.
- 21:1921:19, 9 August 2022 diff hist −216 m VRC7 audio →Debug Mode: Remove unnecessary "1=" from table.
- 21:1721:17, 9 August 2022 diff hist −512 m Everdrive N8 →Mapper compatibility: Removed unnecessary "1=" from table.
- 21:1621:16, 9 August 2022 diff hist −512 m KrzysioCart →Mapper Compatibility: Removed unnecessary "1=" from table. current
- 21:1621:16, 9 August 2022 diff hist −512 m PowerPak →Offical Mappers V1.35b: Removed unnecessary "1=" from table.
- 21:1521:15, 9 August 2022 diff hist −512 m Everdrive N8 Pro →Mapper compatibility: Removed unnecessary "1=" from table. Not sure why I thought it needed that.
29 July 2022
- 18:1718:17, 29 July 2022 diff hist +1,751 Everdrive N8 Pro →Mapper compatibility: Colorized the mapper support table.
- 18:1618:16, 29 July 2022 diff hist +15 PowerPak →Offical Mappers V1.35b: Colorized the mapper support table.
- 18:1318:13, 29 July 2022 diff hist −907 KrzysioCart Added mappers 15 and 30 based on Krzysiobal's eBay page. Colorized the mapper compatibility table.
- 18:1318:13, 29 July 2022 diff hist +1,457 Everdrive N8 →Mapper compatibility: Colorized the mapper compatibility table.
12 July 2022
- 06:0306:03, 12 July 2022 diff hist +36 m Famicom Network System →Data Bus Behavior
- 05:5605:56, 12 July 2022 diff hist +150 Famicom Network System →Data Bus Behavior: expanded first row of table into 3 separate rows.
- 05:4105:41, 12 July 2022 diff hist +86 Famicom Network System →Data Bus Behavior: noted Kanji graphic ROM in table.
10 July 2022
- 20:4720:47, 10 July 2022 diff hist +21 m Famicom Network System →Data Bus Behavior: clarification
- 20:4220:42, 10 July 2022 diff hist −315 Famicom Network System Re-tested RF5C66 pins 41 and 42, and found that they are NOT mirrored at $Cxxx. Mystery solved. Not sure what I was seeing before.
- 15:4015:40, 10 July 2022 diff hist +482 Famicom Network System →Data Bus Behavior: added note about potential bus conflict.
- 02:1902:19, 10 July 2022 diff hist +348 Famicom Network System →Data Bus Behavior: Corrected error where I thought the card bus was driving $00 in blocked address ranges.
- 00:3300:33, 10 July 2022 diff hist −1 m Famicom Network System →Data Bus Behavior: typo fixes
- 00:2900:29, 10 July 2022 diff hist +234 Famicom Network System →Data Bus Behavior: Added note about $4xE0-4xEF.
- 00:1900:19, 10 July 2022 diff hist +1,140 Famicom Network System Added information about behavior of the data bus passing through the RF5C66.
27 June 2022
- 13:5813:58, 27 June 2022 diff hist −43 m MMC5 →Upper CHR Bank bits ($5130): cleanup
- 03:4403:44, 27 June 2022 diff hist −50 MMC5 →Fill-mode tile ($5106): I remembered asking about this in the forum. I updated this with what I learned there.
- 03:3203:32, 27 June 2022 diff hist +3 m MMC5 →Fill-mode color ($5107): fixed a typo
- 01:3101:31, 27 June 2022 diff hist +1,641 MMC5 Reorganized and clarified information about extended RAM mode.
22 June 2022
- 21:5521:55, 22 June 2022 diff hist −21 VRC IRQ →IRQ Control: Made a change that Quietrust discovered when analyzing the VRC7 decap. current
- 17:4317:43, 22 June 2022 diff hist +601 VRC7 pinout Added note about xtal loading caps, for anyone trying to mod TTA for expansion audio.
20 June 2022
- 20:1220:12, 20 June 2022 diff hist +679 VRC7 audio →Debug Mode: Added new information from SCSR.
17 June 2022
- 18:5418:54, 17 June 2022 diff hist 0 VRC7 audio →Debug Mode: Inverted pin 15 (/Debug) in the debug mode input table, per SCSR on discord.
- 18:1018:10, 17 June 2022 diff hist +257 VRC7 audio →Debug Mode: Added info about serial data from Discord.
- 16:4816:48, 17 June 2022 diff hist −24 m VRC7 audio →Debug Mode: Fixed silly mistake.
- 16:4616:46, 17 June 2022 diff hist +117 m VRC7 pinout Added "for more info" comment for Debug mode.
- 16:4016:40, 17 June 2022 diff hist +2,221 VRC7 audio Added debug mode information from SCSR on discord.
- 16:0116:01, 17 June 2022 diff hist +83 VRC7 pinout Added comment based on additional info from SCSR on discord.
16 June 2022
- 05:3605:36, 16 June 2022 diff hist +305 User talk:Lidnariq No edit summary
4 May 2022
- 17:1017:10, 4 May 2022 diff hist +86 User talk:Fiskbit No edit summary current
- 17:0917:09, 4 May 2022 diff hist +1,595 User talk:Fiskbit →Underlines in plain text: new section
11 April 2022
- 23:2423:24, 11 April 2022 diff hist 0 m List of NES music composers No edit summary
- 23:2223:22, 11 April 2022 diff hist +21,464 List of NES music composers Migrated the data from http://nesdev.parodius.com/authors.htm, per the "to do".
8 April 2022
- 22:5722:57, 8 April 2022 diff hist +27 m Famicom Network System →CPU2 Known Registers: clarification
- 22:4622:46, 8 April 2022 diff hist +230 Famicom Network System →Known Registers: Improvement/clarification on register $40D6.
7 April 2022
- 18:1318:13, 7 April 2022 diff hist +107 MMC1 →Hardware: Added mention of MMC1B2F.
6 April 2022
- 16:3316:33, 6 April 2022 diff hist +1,199 List of NES music composers I put the composer as the first column. Added works by Nobuo Uematsu. Not sure if there is a better way to organize multiple games from the same composer. How about multiple composers for 1 game?
29 March 2022
27 March 2022
- 21:4521:45, 27 March 2022 diff hist +88 m Talk:Cartridge connector →Logic thresholds
- 21:4521:45, 27 March 2022 diff hist +265 Talk:Cartridge connector →Logic thresholds: new section
- 21:4021:40, 27 March 2022 diff hist +408 Cartridge connector Note/warning about pin pitch.
26 March 2022
- 20:5420:54, 26 March 2022 diff hist +422 Famicom →Differences from NES: Noted Famicom Titler specifically had the RGB PPU, and no other consoles that I am aware of. Expanded expansion audio info.
20 March 2022
- 20:1520:15, 20 March 2022 diff hist +435 Implementing Mappers In Hardware →74LVC245: More info about controlling DIR, /E
- 20:0220:02, 20 March 2022 diff hist +6,009 Implementing Mappers In Hardware Added information about level shifting. Removed baked-in section numbers, as these are generated automatically. Please improve it if you have anything to add or correct.
18 March 2022
- 19:1219:12, 18 March 2022 diff hist 0 m Implementing Mappers In Hardware →0. IC chips technologies
- 19:0619:06, 18 March 2022 diff hist +810 Implementing Mappers In Hardware →0. IC chips technologies
- 19:0419:04, 18 March 2022 diff hist +31 m Template:Highlight/core No edit summary current
- 19:0319:03, 18 March 2022 diff hist +23 N Template:Highlight/core Created Template:Highlight/core straight from wikipedia
- 19:0119:01, 18 March 2022 diff hist +227 N Template:Highlight Added Template:Highlight straight from wikipedia. current
1 March 2022
- 21:0121:01, 1 March 2022 diff hist +1 m NES 2.0 Mapper 344 →Outer Bank and Mode Register ($6000-$7FFF, write): Showing address bits 0-3 in the mask. current
15 February 2022
- 20:2520:25, 15 February 2022 diff hist +669 Talk:CPU memory map →DMC DMA accessible region: new section
11 February 2022
- 05:1905:19, 11 February 2022 diff hist +1 m Mouse →Other notes: fixed link
4 February 2022
- 17:2717:27, 4 February 2022 diff hist +203 MMC5 →Write: Add warning to register $5208.
- 17:1617:16, 4 February 2022 diff hist +21 MMC5 pinout Improvements to CL/SL mode descriptions.
- 17:0017:00, 4 February 2022 diff hist −14 m ExROM No edit summary current
26 January 2022
- 17:3517:35, 26 January 2022 diff hist +317 Expansion port →Extra notes: Notes about safely using /IRQ in the expansion port.
22 December 2021
- 23:4523:45, 22 December 2021 diff hist +242 Talk:VRC2 and VRC4 No edit summary current
- 20:1320:13, 22 December 2021 diff hist +946 Talk:VRC2 and VRC4 No edit summary
- 00:5300:53, 22 December 2021 diff hist −20 m VRC IRQ Undo revision 19000 by Ben Boldt (talk) Not true, VRC2 does not have IRQ... Tag: Undo
- 00:5100:51, 22 December 2021 diff hist +20 m VRC IRQ Mention VRC2.
- 00:4900:49, 22 December 2021 diff hist +39 m VRC7 Added scanline IRQ category.
- 00:4900:49, 22 December 2021 diff hist +39 m VRC6 Added scanline IRQ category.
- 00:4600:46, 22 December 2021 diff hist +39 m VRC2 and VRC4 Added scanline IRQ category.
8 December 2021
- 18:5718:57, 8 December 2021 diff hist +141 J.Y. Company ASIC →Notes: Added link to krzysiobal's forum thread, which contains a pinout of this glob chip.
- 00:2900:29, 8 December 2021 diff hist +46 J.Y. Company ASIC Added category.
- 00:2300:23, 8 December 2021 diff hist +48 m Category:Mappers using J.Y. Company ASIC No edit summary current
- 00:2200:22, 8 December 2021 diff hist +44 NES 2.0 Mapper 397 Added category. current
- 00:2200:22, 8 December 2021 diff hist +44 NES 2.0 Mapper 388 Added category. current
- 00:2100:21, 8 December 2021 diff hist +44 NES 2.0 Mapper 387 Added category. current
- 00:2100:21, 8 December 2021 diff hist +44 NES 2.0 Mapper 386 Added category. current
- 00:2000:20, 8 December 2021 diff hist +44 NES 2.0 Mapper 358 Added category. current
- 00:2000:20, 8 December 2021 diff hist +44 NES 2.0 Mapper 295 Added category. current
- 00:1900:19, 8 December 2021 diff hist +44 NES 2.0 Mapper 282 Added category. current
- 00:1900:19, 8 December 2021 diff hist +44 NES 2.0 Mapper 281 Added category. current
- 00:1700:17, 8 December 2021 diff hist 0 m INES Mapper 090 No edit summary current
- 00:1700:17, 8 December 2021 diff hist +44 INES Mapper 035 No edit summary current
- 00:1600:16, 8 December 2021 diff hist +44 INES Mapper 211 Added category. current
- 00:1600:16, 8 December 2021 diff hist +44 m INES Mapper 209 Added category. current
- 00:1500:15, 8 December 2021 diff hist +157 J.Y. Company ASIC Added links and listed additional mappers.
- 00:1100:11, 8 December 2021 diff hist 0 N Category:Mappers using J.Y. Company ASIC Created new category for J.Y. Company ASIC mappers.
- 00:1000:10, 8 December 2021 diff hist +204 m INES Mapper 090 Add categories for mapper 90.
7 December 2021
- 16:5716:57, 7 December 2021 diff hist +992 INES Mapper 068 →Registers: Clarifications. No new info added. current
6 December 2021
- 23:1123:11, 6 December 2021 diff hist +318 PPU pinout Additional notes.
25 September 2021
- 19:3719:37, 25 September 2021 diff hist +1,400 Famicom Network System →Connection Status Byte: Added remaining status bytes from Kangyou Sumimaru no Famicom Trade manual.
24 September 2021
- 23:3423:34, 24 September 2021 diff hist +1,183 Famicom Network System →Connection Status Byte: Added Kangyou Sumimaru descriptions for status bytes 03, 04, 05
- 22:3222:32, 24 September 2021 diff hist +352 Famicom Network System →Connection Status Byte: Added error code 01 description from Kangyou Sumimaru no Famicom Trade manual.
- 20:5820:58, 24 September 2021 diff hist +2,897 Famicom Network System →Connection Status Byte: Completed entering Super Mario Club reference data into this section.
- 20:3820:38, 24 September 2021 diff hist +2,027 Famicom Network System →Connection Status Byte: Additional info added from Super Mario Club manual.
- 19:4319:43, 24 September 2021 diff hist +3,108 Famicom Network System →Connection Status Byte: Added some info from Super Mario Club manual.
23 September 2021
- 20:2220:22, 23 September 2021 diff hist +240 Famicom Network System →Commands Written by the Famicom to CPU2: Additional notes for CPU2 command $6A, added "$413x" to names of commands $10, $11, $6A.
16 September 2021
- 21:5621:56, 16 September 2021 diff hist +369 User talk:Abuse filter No edit summary current
- 17:3017:30, 16 September 2021 diff hist +313 User talk:Abuse filter No edit summary
- 15:2215:22, 16 September 2021 diff hist +449 User talk:Abuse filter No edit summary
12 September 2021
8 August 2021
3 August 2021
- 21:3021:30, 3 August 2021 diff hist +620 Talk:MMC5 Thanks for the updates Quietust. It is tough with the forum down. I am adding back a new one about writing PPUDATA past $3FFF which isn't normally possible, just to keep track of the idea.
- 18:0018:00, 3 August 2021 diff hist +14 m Talk:MMC5 →List of Mysteries
- 17:4817:48, 3 August 2021 diff hist +87 m Talk:MMC5 No edit summary
- 17:4817:48, 3 August 2021 diff hist +296 Talk:MMC5 →iNES Mapper 5 page: new section
- 17:4417:44, 3 August 2021 diff hist +124 m Talk:MMC5 →List of Mysteries
- 17:3517:35, 3 August 2021 diff hist +2,487 Talk:MMC5 Added some mysteries to think about.
2 August 2021
- 23:2423:24, 2 August 2021 diff hist +477 Famicom Network System →CPU2 Memory Map: Cleanup.
- 23:0523:05, 2 August 2021 diff hist +215 m Famicom Network System →Pinouts: Cleanup.
31 July 2021
- 23:1823:18, 31 July 2021 diff hist +394 Talk:NES 2.0 Mapper 342 No edit summary
6 July 2021
- 17:1717:17, 6 July 2021 diff hist +3,454 User:Ben Boldt/YM2413 Patches Added Final Fantasy, Sonyc FM, Xak II current
- 04:5804:58, 6 July 2021 diff hist +68 User:Ben Boldt/YM2413 Patches →Yamaha PSS-140 Keyboard Custom Melody Patches: Added the 100 patches, verified with plgDavid.
29 June 2021
- 02:2002:20, 29 June 2021 diff hist +11,870 User:Ben Boldt/YM2413 Patches →MSX Game Custom Melody Patches: Added most of the remaining patches. Still need to do Xak II and review some additional games that my utility may not have detected patches properly.
28 June 2021
- 03:5403:54, 28 June 2021 diff hist −140 m User:Ben Boldt/YM2413 Patches →MSX Game Custom Melody Patches
- 02:5602:56, 28 June 2021 diff hist +3,507 User:Ben Boldt/YM2413 Patches Added some patches from MSX games, found in VGM files. I did Xak first, then continued from the beginning in alphabetical order.
- 01:3501:35, 28 June 2021 diff hist +750 User:Ben Boldt/YM2413 Patches →Lagrange Point Custom Melody Patches: Added all remaining track numbers using a utility I made that can easily extract them from VGM files.
27 June 2021
- 17:3317:33, 27 June 2021 diff hist −18 m User:Ben Boldt/YM2413 Patches I don't know how I make so many typos...
- 17:3317:33, 27 June 2021 diff hist +6 m User:Ben Boldt/YM2413 Patches →Lagrange Point Rhythm Patches
- 17:0817:08, 27 June 2021 diff hist −6 m User:Ben Boldt/YM2413 Patches No edit summary
- 16:3016:30, 27 June 2021 diff hist +37 User:Ben Boldt/YM2413 Patches No edit summary
- 16:2616:26, 27 June 2021 diff hist +3,789 User:Ben Boldt/YM2413 Patches Added patches from Lagrange Point ROM.
26 June 2021
- 15:1715:17, 26 June 2021 diff hist +23 m User:Ben Boldt/YM2413 Patches No edit summary
25 June 2021
- 21:0621:06, 25 June 2021 diff hist +6,687 N User:Ben Boldt/YM2413 Patches Created page.
14 June 2021
- 23:5923:59, 14 June 2021 diff hist +16 m Famicom Network System →P2: Game Card Connector: Added that pin 3 is N/C in JRA-PAT.
- 03:4203:42, 14 June 2021 diff hist +122 PPU pinout →Composite Video Output: Corrected PNP ascii graphic and added that 2N3906 can be substituted.
5 June 2021
- 17:1717:17, 5 June 2021 diff hist +642 MMC5 audio Added expansion audio circuit used on HVC-ETROM-02 PCB.
16 May 2021
- 00:4700:47, 16 May 2021 diff hist −148 Famicom Network System →CPU2 Known Registers: New test setup with internal ROM disabled: Confirmed $412F.7 is UART Rx IRQ Enable and writing 1 to $4112.7 acknowledges it.
15 May 2021
- 21:5221:52, 15 May 2021 diff hist +117 Famicom Network System →RF5A18 CPU2 / Modem Controller: Details about pin 26 to disable internal ROM, also its effect on ROM /CE.
13 May 2021
- 21:4421:44, 13 May 2021 diff hist +148 Famicom Network System →Commands Written by the Famicom to CPU2: Improved info about command $10/$90, $11/$91 responses.
- 06:0106:01, 13 May 2021 diff hist +128 MMC6 Listed StarTropics and StarTropics II.
- 06:0006:00, 13 May 2021 diff hist +42 N Template:Citation needed Added crude [citation needed] template. current
- 01:3701:37, 13 May 2021 diff hist +229 m Famicom Network System →Commands Written by the Famicom to CPU2: Cleanup command $10 collapsed table I just added, also un-bold collapsed tables in $7D to be consistent.
- 01:2301:23, 13 May 2021 diff hist +1,566 Famicom Network System →Commands Written by the Famicom to CPU2: Added ROM data used in command $10
11 May 2021
- 00:2900:29, 11 May 2021 diff hist +2,045 Famicom Network System →CPU2 Known Registers: Added some ROM observations of registers $413x.
10 May 2021
- 05:0705:07, 10 May 2021 diff hist +755 Famicom Network System →CPU2 Commands: Found $90 and $91 response commands for commands $10 and $11. Confirmed command $C0 is a UART Rx packet.
9 May 2021
- 01:5401:54, 9 May 2021 diff hist −9 m Famicom Network System →CPU2 Known Registers: Named $4112 "UART Status".
- 01:4701:47, 9 May 2021 diff hist −806 Famicom Network System →CPU2 Known Registers: Found writing $4112.7 = 1 clears the error bits. Read/write $4110 was probably affecting the non-error bits indirectly (freeing up the buffers, etc.), making me think it was clearing them.
- 01:0601:06, 9 May 2021 diff hist +649 Famicom Network System →CPU2 Known Registers: Dual stop bit only applies to UART Tx, not Rx. More details clearing $4112 and Rx Break.
8 May 2021
- 23:1723:17, 8 May 2021 diff hist +311 Famicom Network System Clarified $4112.0 and .1. Reading $4110 also clears $4112 if UART Rx is enabled.
- 22:2122:21, 8 May 2021 diff hist +291 Famicom Network System →Known Registers: Added info about $40D6.1 and .2 read values.
- 04:1004:10, 8 May 2021 diff hist −97 Famicom Network System →RF5A18 CPU2 / Modem Controller: Reverting incorrect change I introduced on May 3, 2021. Pins 65&66 are bidirectional using $40D4.
7 May 2021
- 03:1703:17, 7 May 2021 diff hist +259 Famicom Network System →CPU2 Known Registers: Added $4112.2: UART Tx Idle. Clarified that $4112.1 indicates the Tx buffer is ready.
- 01:4501:45, 7 May 2021 diff hist −5 m Famicom Network System Cleanup
6 May 2021
- 02:2102:21, 6 May 2021 diff hist +60 Famicom Network System →CPU2 Known Registers: Added $4112.5 framing error, thanks to lidnariq.
- 01:2801:28, 6 May 2021 diff hist +910 Famicom Network System →CPU2 Known Registers: Confirmed some things for UART Rx, found parity error flag for Rx.
5 May 2021
- 23:4923:49, 5 May 2021 diff hist +208 m Famicom Network System →CPU2 Known Registers: Clarify that the UART Rx does appear to trigger an IRQ somehow, will try to confirm that with a bench test somehow.
- 16:1416:14, 5 May 2021 diff hist +533 Famicom Network System →CPU2 Known Registers: Improved built-in ROM observations of register $4111.
- 01:4701:47, 5 May 2021 diff hist +173 Famicom Network System →Known Registers: Added notes to $40D5 about reading it in real-time.
- 01:3301:33, 5 May 2021 diff hist +96 Famicom Network System →CPU2 Known Registers: Found pin 33 (MSM6827L /INT) and pin 73 (Tone Rx DV) IRQ enables on the RF5A18 chip, register $412F
- 00:4100:41, 5 May 2021 diff hist −63 Famicom Network System →CPU2 Known Registers: Removed $4113.4 write after not being able to reproduce it.
- 00:3500:35, 5 May 2021 diff hist +302 Famicom Network System →CPU2 Known Registers: Added even/odd parity for UART in $4111.
4 May 2021
- 23:4523:45, 4 May 2021 diff hist +474 Famicom Network System →CPU2 Known Registers: Added more UART findings.
- 13:3813:38, 4 May 2021 diff hist +63 m Famicom Network System →CPU2 Known Registers: Cleanup.
- 04:3604:36, 4 May 2021 diff hist +2 m Famicom Network System →CPU2 Known Registers: Fixed error where I put $4112.2 as read instead of write.
- 02:1002:10, 4 May 2021 diff hist +935 Famicom Network System →CPU2 Known Registers: Added some control register bits that affect pin 90 (MSM6827L TXD)
- 01:1501:15, 4 May 2021 diff hist 0 Famicom Network System →RF5A18 CPU2 / Modem Controller: Corrected RF5A18 pins 38, 39 are outputs only, pins 65, 66 are input only (none of those appear to behave bidirectional).
- 00:1900:19, 4 May 2021 diff hist +57 Famicom Network System →CPU2 Known Registers: Note that Pin 32 is a push-pull output when set as output mode in $4120.6
- 00:0800:08, 4 May 2021 diff hist +579 Famicom Network System Added info for $40D5.4 frequency depending on value written to $4114 bits 1 and 0.
2 May 2021
- 02:0402:04, 2 May 2021 diff hist +383 Famicom Network System →CPU2 Known Registers: Added details for $4120/$4121 input/output modes for pin 32.
- 01:3001:30, 2 May 2021 diff hist −43 Famicom Network System Updated push-pull vs. open drain configuration of Exp P3-17,18,19 via Famicom register $40D4.
- 00:1500:15, 2 May 2021 diff hist −68 m Famicom Network System →Known Registers: cleanup
1 May 2021
- 23:3023:30, 1 May 2021 diff hist +313 Famicom Network System Found more connections with register $40D6, depending on CPU2 registers $4112 and $4113.
- 01:4501:45, 1 May 2021 diff hist +1,492 Famicom Network System Added /IRQ pin to CPU2, removed +IRQ (can't replicate that), added info about $412F.5 IRQ
27 April 2021
- 15:1415:14, 27 April 2021 diff hist +432 Famicom Network System →CPU2 Known Registers: Corrected errors in register $4127 reference data.
26 April 2021
- 04:4904:49, 26 April 2021 diff hist +411 m Famicom Network System →Commands Written by the Famicom to CPU2: Cleanup
- 02:5502:55, 26 April 2021 diff hist −14 m Famicom Network System →Commands Written by the Famicom to CPU2
15 April 2021
- 22:5422:54, 15 April 2021 diff hist +113 Famicom Network System →CPU2 Known Registers: Added additional $4112 read bit observations.
- 22:4322:43, 15 April 2021 diff hist +716 Famicom Network System →CPU2 Known Registers: Added a few small observations.
12 April 2021
- 02:0902:09, 12 April 2021 diff hist +842 Famicom Network System →CPU2 Known Registers: Added newly-found info about IRQ timer in registers $4104,5,6,7 and $412F.6. It is similar to the NMI timer found by Joe.
- 00:3300:33, 12 April 2021 diff hist +224 m Famicom Network System →CPU2 Known Registers: Update "Read Has Data" column and change "(unknown)" read bits to "(unlikely to exist)" based on observed internal open bus behavior.
11 April 2021
- 23:3523:35, 11 April 2021 diff hist +318 Famicom Network System →Commands Written by the Famicom to CPU2: Cleanup.
- 23:0323:03, 11 April 2021 diff hist +40 Famicom Network System →CPU2 Known Registers: Added $4102.0 = NMI timer loop.
- 22:4322:43, 11 April 2021 diff hist +683 Famicom Network System →CPU2 Known Registers: Added info found about timer NMI.
10 April 2021
- 20:5120:51, 10 April 2021 diff hist +59 Famicom Network System →RF5A18 Internal 65C02 CPU: Measured CPU2 clock speed and found that it is 2.4576MHz.
7 April 2021
- 20:4920:49, 7 April 2021 diff hist −76 Famicom Network System Undo revision 18582: Theoretically pins 43-46 could be A8-A11, I don't want to exclude that.
- 20:4320:43, 7 April 2021 diff hist +76 Famicom Network System →Disk Drive Support: Updated statement about internal DRAM, not really possible.
6 April 2021
- 22:4022:40, 6 April 2021 diff hist +54 Famicom Network System →CPU2 Known Registers: Added clock source theory to Joe's awesome NMI findings.
5 April 2021
- 02:3802:38, 5 April 2021 diff hist 0 m Famicom Network System →RF5A18 CPU2 / Modem Controller: Corrected error I made on Jan 29, 2021 where RF5A18 pin 40 lost its (n/c) label.
4 April 2021
- 20:0120:01, 4 April 2021 diff hist +448 Famicom Network System Updated modem signals
2 April 2021
- 23:1623:16, 2 April 2021 diff hist +1,629 Famicom Network System →CPU2 Commands: Added table for connection status byte used in $80,81,82 response commands.
- 16:2616:26, 2 April 2021 diff hist +87 Famicom Network System →Commands Written by the Famicom to CPU2: Added $80/$81/$82 status bytes found in CPU2 ROM.
- 15:5715:57, 2 April 2021 diff hist +1,509 Famicom Network System →CPU2 Commands: Added some more CPU2 response commands.
1 April 2021
- 23:1423:14, 1 April 2021 diff hist +2,056 m Famicom Network System →Known Registers: Added more collapsible wikitables to hide messy reference data.
- 02:5402:54, 1 April 2021 diff hist +2,656 m Famicom Network System →CPU2 Known Registers: Hid a bunch of messy stuff inside collapsed tables
- 02:2202:22, 1 April 2021 diff hist +1,281 Famicom Network System →Commands Written by the Famicom to CPU2: Added disassembly of JRA-PAT's use of $7D, put disassemblies into collapsed wikitables.
- 00:2900:29, 1 April 2021 diff hist +20 m Famicom Network System →Commands Written by the Famicom to CPU2
31 March 2021
- 23:5323:53, 31 March 2021 diff hist +430 Famicom Network System →CPU2 Commands: Added some more CPU2 messages observed from JRA-PAT and added revisions.
- 05:1405:14, 31 March 2021 diff hist +186 Famicom Network System →Commands Written by the Famicom to CPU2: Improved Command $7D example disassembly
- 04:4204:42, 31 March 2021 diff hist +471 Famicom Network System →Commands Written by the Famicom to CPU2: Added disassembly of arbitrary code that Super Mario Club writes with command $7D.
30 March 2021
- 01:0201:02, 30 March 2021 diff hist +418 Famicom Network System →CPU2 Commands: Added examples of commands $03 and $7D from Super Mario Club
29 March 2021
- 23:5323:53, 29 March 2021 diff hist +13 Famicom Network System →CPU2 Commands: Removed incorrect information about response command $80 from command $69. Added PiT command examples $60 and $00.
- 16:0916:09, 29 March 2021 diff hist 0 Famicom Network System Swapped EXCLK and /RD of the MSM6827 chip as pointed out by Joe in the forum. No similar errors found testing the related signals.
- 06:2406:24, 29 March 2021 diff hist −20 m Famicom Network System →CPU2 Commands
- 01:4201:42, 29 March 2021 diff hist +1,207 Famicom Network System →CPU2 Commands: Added additional examples of response command $80 and added info that command $69 also generates response command $80.
27 March 2021
- 17:0517:05, 27 March 2021 diff hist −6 m Famicom Network System →Commands Written by the Famicom to CPU2
- 16:5616:56, 27 March 2021 diff hist +2 m Famicom Network System →Commands Written by the Famicom to CPU2
- 16:5516:55, 27 March 2021 diff hist +1,172 Famicom Network System →Commands Written by the Famicom to CPU2: Added observed CPU2 commands from forum thread.
- 14:2214:22, 27 March 2021 diff hist +739 Famicom Network System →CPU2 Commands: Added info about response $80 from CPU2 command $00.
21 March 2021
- 15:0015:00, 21 March 2021 diff hist +1,534 User:Ben Boldt Added pinout current
- 05:2705:27, 21 March 2021 diff hist +48 PPU pinout →Signal description: Added comment, /CS is sometimes called /DBE.
18 March 2021
- 03:3503:35, 18 March 2021 diff hist +635 m Famicom Network System →CPU2 Known Registers: Cleanup.
16 March 2021
- 15:1015:10, 16 March 2021 diff hist +9 Famicom Network System →Commands Written by the Famicom to CPU2: Added a couple ways to disconnect the modem.
- 14:4014:40, 16 March 2021 diff hist +786 Famicom Network System →CPU2 Known Registers: Added some IRQ / NMI info.
15 March 2021
- 06:5306:53, 15 March 2021 diff hist +18 m Famicom Network System →Commands Written by the Famicom to CPU2: Reduced excessive width of command $11.
- 04:0104:01, 15 March 2021 diff hist +45 m Famicom Network System →Commands Read by the Famicom from CPU2: Clarification in CPU2->FC command 0xC1.
- 03:5403:54, 15 March 2021 diff hist +1,623 Famicom Network System →CPU2 Commands: Organized CPU2 read commands into a new section, added read commands $C0 and $C1.
14 March 2021
- 23:1623:16, 14 March 2021 diff hist +589 Famicom Network System →CPU2 Commands: Added information to CPU2 command $03.
- 22:0422:04, 14 March 2021 diff hist +20 m Famicom Network System →CPU2 Known Registers: Update CPU2 register $4102 description.
- 21:2421:24, 14 March 2021 diff hist +116 Famicom Network System →CPU2 Commands: Added some CPU2 command responses.
