User contributions for Quietust

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15 June 2011

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  • 03:1803:18, 11 May 2011 diff hist −10 File:Apu address.jpgit also overrides the noise channel's LFSR output and appears to also stop the triangle channel from being clocked; I don't know what it does to DPCM, but it's probably something similar current
  • 03:0303:03, 11 May 2011 diff hist +12 File:Apu address.jpgsetting $401A.7 prevents the square channels from outputting 0000, whether from the duty cycle generator, the sweep unit, or the length counter; the effect on triangle/noise/PCM is still unclear

10 May 2011

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  • 15:4715:47, 18 January 2011 diff hist +330 N File:Palette.jpgPalette RAM as physically implemented within the PPU. Note the incomplete address decoding which results in $10/$14/$18/$1C being mirrors of $00/$04/$08/$0C. Also of note, palette RAM bits are significantly larger than those of OAM (which are believed to

14 January 2011

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30 December 2010

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11 February 2010

  • 21:2821:28, 11 February 2010 diff hist +2 TFROMsee http://kevtris.org/mappers/mmc3/NES_TFROM.html - pad CL2 is connected directly to cart edge pin 15 (which is /IRQ), while CL1 is right next to H and V

5 February 2010

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5 January 2010

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