Talk:Comparison of Nintendo mappers

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Revision as of 22:18, 7 October 2012 by Tepples (talk | contribs) (→‎Rare discrete logic: 78 need not be so ambiguous under NES 2.0)
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Rare discrete logic

This table describes the mappers as they existed, as opposed to any obvious oversize extensions.

You probably don't actually want to use these.

iNES Chips Max PRG PRG bank size Max CHR CHR bank size Mirroring PRG RAM? Bus conflicts?
11 1 128 32 128 8 V/H hardwired No Yes
38 2 128 32 32 8 V/H hardwired Impossible No
70 3 256 16 + 16F 128 8 V/H hardwired No Likely
72 4+speech 256 16 + 16F 128 8 V/H hardwired No Yes
77 4 512 32 32 + 6RAM 2 4 No Likely
78a 5 128 16 + 16F 128 8 V/H switchable No Yes
78b 3 128 16 + 16F 128 8 1 No Likely
79 2 64 32 64 8 V/H hardwired No No
86 3+speech 128 32 64 8 V/H hardwired Impossible No
87 2 32 32 8 V/H hardwired Impossible No
89 (2)† 128 16 + 16F 128 8 1 No Yes
92 5+speech 256 16F + 16 128 8 V/H hardwired No Yes
93 (2)† 128 16 + 16F 8‡ V/H hardwired No Yes
94 2 128 16 + 16F 8 V/H hardwired No Yes
96 3 128 32 32RAM 16 V/H hardwired No Likely
99 0* 40 8 + 24F 16 8 4 No No
140 3 128 32 128 8 V/H hardwired Impossible No
152 3 128 16 + 16F 128 8 1 No Likely
184 (3)† 32 32 4 + 4 V/H hardwired Impossible No

† Mappers 89, 93, and 184 exist as a single IC, however their functions are trivially described using a small number of 7400-series ICs, and likely contain multiple silicon dice that were wire bonded together in the same package.

‡ Mapper 93 is technically the same 89 other than mirroring, but it only commercially existed using 8kB of CHR-RAM

* the Vs System distributed its original games as five or six 8 KiB ROMs, and decoding on its mainboard allowed banking of CHR like CNROM. It is a little disingenuous to claim that 0 ICs were necessary for banking since the same functionality is not possible on a Famicom, however, banking was incrementally free.