TxROM

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The generic designation TxROM refers to cartridge boards made by Nintendo that use the Nintendo MMC3 mapper.

The following TxROM boards are known to exist:

Board PRG ROM PRG RAM CHR
TBROM 64 KB 32, 64 KB ROM
TEROM 32 KB 32, 64 KB ROM
TFROM 128, 256, 512 KB 32, 64 KB ROM
TGROM 128, 256, 512 KB 8 KB RAM
TKROM 128, 256, 512 KB 8 KB 128, 256 KB ROM
TKSROM 128, 256, 512 KB 8 KB 128 KB ROM
TLROM 128, 256, 512 KB 128, 256 KB ROM
TLSROM 128, 256, 512 KB 128 KB ROM
TNROM 128, 256, 512 KB 8 KB 8 KB RAM
TR1ROM 128, 256, 512 KB 64 KB ROM + 4 KB VRAM (4-screen Mirroring)
TSROM 128, 256, 512 KB 8 KB (no battery) 128, 256 KB ROM
TQROM 128 KB 32, 64 KB ROM + 8 KB RAM
TVROM 64 KB 32, 64 KB ROM + 4 KB VRAM (4-screen Mirroring)

Solder pad config

Namco 108 backwards compatibility mode (TEROM and TFROM boards only)

  • Normal mode (default) : 'CL1' connected, 'CL2' connected, 'H' disconnected, 'V' disconnected.
  • DxROM backward compatibility mode with Horizontal mirroring : 'CL1' disconnected, 'CL2' disconnected, 'H' disconnected, 'V' connected.
  • DxROM backward compatibility mode with Vertical mirroring : 'CL1' disconnected, 'CL2' disconnected, 'H' connected, 'V' disconnected.

Connecting 'CL1' enables MMC3-controlled mirroring, while connecting 'CL2' enables IRQs. However, the additional bankswitching modes available by the MMC3 that weren't available with the 109 chip used on DEROM boards are still present.

Battery retention (TNROM, TKROM and TKSROM boards only) :

  • PRG RAM retaining data : 'SL' disconnected, Battery, D1, D2, R1 R2 and R3 present.
  • PRG RAM not retaining data : 'SL' connected, leave slots for Battery, D1, D2, R1, R2 and R3 free.

Various notes

Boards with 4-screen mirroring uses a 8 KB SRAM chip, but only 4 KB is actually used. The 2 KB VRAM inside of the console is always disabled, and the CIRAM A10 pin of the MMC3 doesn't go to anything.

TLSROM and TKSROM boards have different mirroring control than other MMC3 boards. The mirroring is controlled directly by MMC3's CHR A16 line, and MMC3's CIRAM A10 pin doesn't go to anything. Due to their incompatibility with other MMC3 boards on a software viewpoint, they are assigned to INES Mapper 118 instead of mapper 4.

TQROM board has both CHR ROM and RAM. MMC3's CHR A16 line controls whenever CHR RAM or CHR-ROM is enabled. A 74HC32 chip is used to combine this with other chip enable signals for the CHR-ROM and the CHR-RAM chips. Due to this incompatibility with the other MMC3 boards on a software viewpoint, this board is assigned to INES Mapper 119 instead of mapper 4.